Quoting Petri Latvala (2020-05-11 10:49:10) > On Mon, May 11, 2020 at 10:39:24AM +0100, Chris Wilson wrote: > > Change the basic pre-mergetest to do a single pass over all engines > > simultaneously. This should take no longer than checking a single > > engine, while providing just the right amount of stress regardless of > > machine size. > > > > v2: Move around the quiescence and requires to avoid calling them from > > the children. > > > > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > > Cc: Petri Latvala <petri.latvala@xxxxxxxxx> > > --- > > tests/i915/gem_ringfill.c | 31 ++++++++++++++++++++------- > > tests/intel-ci/fast-feedback.testlist | 2 +- > > 2 files changed, 24 insertions(+), 9 deletions(-) > > > > diff --git a/tests/i915/gem_ringfill.c b/tests/i915/gem_ringfill.c > > index a2157bd6f..05b997ed4 100644 > > --- a/tests/i915/gem_ringfill.c > > +++ b/tests/i915/gem_ringfill.c > > @@ -178,13 +178,11 @@ static void run_test(int fd, unsigned ring, unsigned flags, unsigned timeout) > > struct drm_i915_gem_execbuffer2 execbuf; > > igt_hang_t hang; > > > > - gem_require_ring(fd, ring); > > - igt_require(gem_can_store_dword(fd, ring)); > > - > > - if (flags & (SUSPEND | HIBERNATE)) > > + if (flags & (SUSPEND | HIBERNATE)) { > > run_test(fd, ring, 0, 0); > > + gem_quiescent_gpu(fd); > > + } > > > > - gem_quiescent_gpu(fd); > > igt_require(setup_execbuf(fd, &execbuf, obj, reloc, ring) == 0); > > What about this one? If that fails, I'll accept the punishment of having to debug a mysterious segfault. That's a require for v3.10. -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx