Lionel Landwerlin <lionel.g.landwerlin@xxxxxxxxx> writes: > On 05/05/2020 03:09, D Scott Phillips wrote: >> D Scott Phillips <d.scott.phillips@xxxxxxxxx> writes: >> >>> Previously we set HDC_PIPELINE_FLUSH in dword 1 of gen12 >>> pipe_control commands. HDC Pipeline flush actually resides in >>> dword 0, and the bit we were setting in dword 1 was Indirect State >>> Pointers Disable, which invalidates indirect state in the render >>> context. This causes failures for userspace, as things like push >>> constant state gets invalidated. >>> >>> Cc: Mika Kuoppala <mika.kuoppala@xxxxxxxxxxxxxxx> >>> Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> >>> Signed-off-by: D Scott Phillips <d.scott.phillips@xxxxxxxxx> >> also, >> >> Fixes: 4aa0b5d457f5 ("drm/i915/tgl: Add HDC Pipeline Flush") >> _______________________________________________ >> Intel-gfx mailing list >> Intel-gfx@xxxxxxxxxxxxxxxxxxxxx >> https://lists.freedesktop.org/mailman/listinfo/intel-gfx > > I think Mika sent the same patch in "drm/i915/gen12: Fix HDC pipeline > flush". > > -Lionel Ah, quite right, I missed it. Ignore this. _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx