== Series Details == Series: Consider DBuf bandwidth when calculating CDCLK (rev9) URL : https://patchwork.freedesktop.org/series/74739/ State : success == Summary == CI Bug Log - changes from CI_DRM_8430 -> Patchwork_17583 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17583/index.html Changes ------- No changes found Participating hosts (50 -> 43) ------------------------------ Missing (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper fi-bdw-samus Build changes ------------- * CI: CI-20190529 -> None * Linux: CI_DRM_8430 -> Patchwork_17583 CI-20190529: 20190529 CI_DRM_8430: 2daa6f8cad645f49a898158190a20a893b4aabe3 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5632: e630cb8cd2ec01d6d5358eb2a3f6ea70498b8183 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_17583: 0792cc71d598d77d1570d73068661bd1cd504e02 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 0792cc71d598 drm/i915: Remove unneeded hack now for CDCLK 6b07838f4a00 drm/i915: Adjust CDCLK accordingly to our DBuf bw needs 0c2d539a68ee drm/i915: Introduce for_each_dbuf_slice_in_mask macro 0debc96ba00f drm/i915: Force recalculate min_cdclk if planes config changed b9fba3b4f20a drm/i915: Decouple cdclk calculation from modeset checks == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17583/index.html _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
