Reviewed by: Bob.J.Paauwe@xxxxxxxxx
--
Bob Paauwe
Bob.J.Paauwe@xxxxxxxxx
IOTG / Platform Software Engineering
Intel Corp. Folsom, CA
(916) 356-6193
(530) 409-0831 (cell)
> -----Original Message-----
> From: Roper, Matthew D <matthew.d.roper@xxxxxxxxx>
> Sent: Friday, May 01, 2020 2:37 PM
> To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> Cc: Roper, Matthew D <matthew.d.roper@xxxxxxxxx>; Paauwe, Bob J
> <bob.j.paauwe@xxxxxxxxx>
> Subject: [PATCH] drm/i915/icp: Add Wa_14010685332
>
> We need to toggle a SDE chicken bit on and then off as the final
> step when disabling interrupts in preparation for runtime suspend.
>
> Bspec: 33450
> Bspec: 8402
> Cc: Bob Paauwe <bob.j.paauwe@xxxxxxxxx>
> Signed-off-by: Matt Roper <matthew.d.roper@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/i915_irq.c | 8 ++++++++
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> 2 files changed, 9 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c
> b/drivers/gpu/drm/i915/i915_irq.c
> index bd722d0650c8..f8202a32c112 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -2870,6 +2870,14 @@ static void gen11_display_irq_reset(struct
> drm_i915_private *dev_priv)
>
> if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP)
> GEN3_IRQ_RESET(uncore, SDE);
> +
> + /* Wa_14010685332:icl */
> + if (INTEL_PCH_TYPE(dev_priv) == PCH_ICP) {
> + intel_uncore_rmw(uncore, SOUTH_CHICKEN1,
> + SBCLK_RUN_REFCLK_DIS,
> SBCLK_RUN_REFCLK_DIS);
> + intel_uncore_rmw(uncore, SOUTH_CHICKEN1,
> + SBCLK_RUN_REFCLK_DIS, 0);
> + }
> }
>
> static void gen11_irq_reset(struct drm_i915_private *dev_priv)
> diff --git a/drivers/gpu/drm/i915/i915_reg.h
> b/drivers/gpu/drm/i915/i915_reg.h
> index fd9f2904d93c..34af899751e2 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -8573,6 +8573,7 @@ enum {
> #define FDI_BC_BIFURCATION_SELECT (1 << 12)
> #define CHASSIS_CLK_REQ_DURATION_MASK (0xf << 8)
> #define CHASSIS_CLK_REQ_DURATION(x) ((x) << 8)
> +#define SBCLK_RUN_REFCLK_DIS (1 << 7)
> #define SPT_PWM_GRANULARITY (1 << 0)
> #define SOUTH_CHICKEN2 _MMIO(0xc2004)
> #define FDI_MPHY_IOSFSB_RESET_STATUS (1 << 13)
> --
> 2.24.1
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