[PATCH v2] drm/i915: HDMI/DP - ELD info refresh support for Haswell

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> -----Original Message-----
> From: Ville Syrj?l? [mailto:ville.syrjala at linux.intel.com]
> Sent: Friday, January 18, 2013 6:46 PM
> To: Wang, Xingchao
> Cc: intel-gfx at lists.freedesktop.org; daniel.vetter at ffwll.ch; Zanoni, Paulo R
> Subject: Re: [PATCH v2] drm/i915: HDMI/DP - ELD info refresh
> support for Haswell
> 
> On Fri, Jan 18, 2013 at 10:51:55AM +0800, Wang Xingchao wrote:
> > ELD info should be updated dynamically according to hot plug event.
> > For haswell chip, clear/set the eld valid bit and output enable bit
> > from callback intel_disable/eanble_ddi().
> 
> Hmm. Is it OK to set the ELD valid bit if the ELD hasn't actually been written?

This triggers an unsolicited event to ALSA driver which continue to read ELD info.
> 
> And besides these bits are already set by haswell_write_eld().

Intel_disable/enable_ddi() was called even after haswell_write_eld(), so we need set the bits again.

Thanks
--xingchao
> 
> >
> > Signed-off-by: Wang Xingchao <xingchao.wang at intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_ddi.c |   18 ++++++++++++++++++
> >  1 file changed, 18 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_ddi.c
> > b/drivers/gpu/drm/i915/intel_ddi.c
> > index f02b3fe..7ce4728 100644
> > --- a/drivers/gpu/drm/i915/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/intel_ddi.c
> > @@ -1274,10 +1274,14 @@ static void intel_ddi_post_disable(struct
> > intel_encoder *intel_encoder)  static void intel_enable_ddi(struct
> > intel_encoder *intel_encoder)  {
> >  	struct drm_encoder *encoder = &intel_encoder->base;
> > +	struct drm_crtc *crtc = encoder->crtc;
> > +	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> > +	int pipe = intel_crtc->pipe;
> >  	struct drm_device *dev = encoder->dev;
> >  	struct drm_i915_private *dev_priv = dev->dev_private;
> >  	enum port port = intel_ddi_get_encoder_port(intel_encoder);
> >  	int type = intel_encoder->type;
> > +	int tmp;
> >
> >  	if (type == INTEL_OUTPUT_HDMI) {
> >  		/* In HDMI/DVI mode, the port width, and swing/emphasis values
> @@
> > -1290,18 +1294,32 @@ static void intel_enable_ddi(struct intel_encoder
> > *intel_encoder)
> >
> >  		ironlake_edp_backlight_on(intel_dp);
> >  	}
> > +
> > +	tmp = I915_READ(HSW_AUD_PIN_ELD_CP_VLD);
> > +	tmp |= ((AUDIO_OUTPUT_ENABLE_A | AUDIO_ELD_VALID_A) << (pipe *
> 4));
> > +	I915_WRITE(HSW_AUD_PIN_ELD_CP_VLD, tmp);
> >  }
> >
> >  static void intel_disable_ddi(struct intel_encoder *intel_encoder)  {
> >  	struct drm_encoder *encoder = &intel_encoder->base;
> > +	struct drm_crtc *crtc = encoder->crtc;
> > +	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> > +	int pipe = intel_crtc->pipe;
> >  	int type = intel_encoder->type;
> > +	struct drm_device *dev = encoder->dev;
> > +	struct drm_i915_private *dev_priv = dev->dev_private;
> > +	int tmp;
> >
> >  	if (type == INTEL_OUTPUT_EDP) {
> >  		struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> >
> >  		ironlake_edp_backlight_off(intel_dp);
> >  	}
> > +
> > +	tmp = I915_READ(HSW_AUD_PIN_ELD_CP_VLD);
> > +	tmp &= ~((AUDIO_OUTPUT_ENABLE_A | AUDIO_ELD_VALID_A) << (pipe *
> 4));
> > +	I915_WRITE(HSW_AUD_PIN_ELD_CP_VLD, tmp);
> >  }
> >
> >  int intel_ddi_get_cdclk_freq(struct drm_i915_private *dev_priv)
> > --
> > 1.7.9.5
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx at lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> --
> Ville Syrj?l?
> Intel OTC


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