Quoting Mika Kuoppala (2020-04-24 17:54:27) > if (wa_ctx->indirect_ctx.size) { > - const u32 ggtt_offset = i915_ggtt_offset(wa_ctx->vma); > + const u32 bb_offset = i915_ggtt_offset(wa_ctx->vma) + > + wa_ctx->indirect_ctx.offset; > + const u32 bb_size = wa_ctx->indirect_ctx.size; > > - GEM_BUG_ON(lrc_ring_indirect_ptr(engine) == -1); > - regs[lrc_ring_indirect_ptr(engine) + 1] = > - (ggtt_offset + wa_ctx->indirect_ctx.offset) | > - (wa_ctx->indirect_ctx.size / CACHELINE_BYTES); > - > - GEM_BUG_ON(lrc_ring_indirect_offset(engine) == -1); > - regs[lrc_ring_indirect_offset(engine) + 1] = > - lrc_ring_indirect_offset_default(engine) << 6; > + lrc_ring_setup_indirect_ctx(ce, bb_offset, bb_size); Eek, please teach this to stick to regs and engine. Otherwise we'll fall into the virtual engine trap. -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx