Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> writes:
> Quoting Chris Wilson (2020-04-21 14:45:12)
>> In RPS, we have the option to only specify the unslice [ring] clock
>> ratio and for the pcu to derive the slice [gpu] clock ratio from its
>> magic table. We also have the option to tell the pcu to use our
>> requested gpu clock ratio, and for it to try and throttle the unslice
>> and slice ratios separately.
>>
>> Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
>> Cc: Mika Kuoppala <mika.kuoppala@xxxxxxxxxxxxxxx>
>> ---
>> drivers/gpu/drm/i915/gt/intel_rps.c | 11 +++++++----
>> 1 file changed, 7 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
>> index 4dcfae16a7ce..07321e1b22f6 100644
>> --- a/drivers/gpu/drm/i915/gt/intel_rps.c
>> +++ b/drivers/gpu/drm/i915/gt/intel_rps.c
>> @@ -662,14 +662,17 @@ static int gen6_rps_set(struct intel_rps *rps, u8 val)
>> struct drm_i915_private *i915 = rps_to_i915(rps);
>> u32 swreq;
>>
>> - if (INTEL_GEN(i915) >= 9)
>> - swreq = GEN9_FREQUENCY(val);
>> - else if (IS_HASWELL(i915) || IS_BROADWELL(i915))
>> + if (INTEL_GEN(i915) >= 9) {
>> + swreq = 0x2; /* only throttle slice, not unslice */
>
> 0x0 == use implicit slice ratio
> 0x1 == use explicit slice ratio
> 0x2 == use separate throttling
Care to enum/define these and add as parameter to GEN9_FREQUENCY?
Also if there is any bspec link, add a reference.
Thanks,
-Mika
>
> Not sure if 0x2 actually was implemented in the end.
> -Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
