From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
No reason that I can see why we should enable TRANS_DDI_FUNC_CTL
before we set up the watermarks of confogiure the mbus stuff.
In fact reordering these seems to match the bspec sequence better,
and cricually will allow us to push the TRANS_DDI_FUNC_CTL enable
into the encoder enable hook as a followup.
Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
---
drivers/gpu/drm/i915/display/intel_display.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index af5b4055b38a..7a1e7b5ae84e 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -7071,15 +7071,15 @@ static void hsw_crtc_enable(struct intel_atomic_state *state,
if (INTEL_GEN(dev_priv) >= 11)
icl_set_pipe_chicken(crtc);
- if (!transcoder_is_dsi(cpu_transcoder))
- intel_ddi_enable_transcoder_func(new_crtc_state);
-
if (dev_priv->display.initial_watermarks)
dev_priv->display.initial_watermarks(state, crtc);
if (INTEL_GEN(dev_priv) >= 11)
icl_pipe_mbus_enable(crtc);
+ if (!transcoder_is_dsi(cpu_transcoder))
+ intel_ddi_enable_transcoder_func(new_crtc_state);
+
intel_encoders_enable(state, crtc);
if (psl_clkgate_wa) {
--
2.24.1
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