> -----Original Message----- > From: Jani Nikula <jani.nikula@xxxxxxxxxxxxxxx> > Sent: Thursday, April 16, 2020 2:10 AM > To: Paauwe, Bob J <bob.j.paauwe@xxxxxxxxx>; intel-gfx <intel- > gfx@xxxxxxxxxxxxxxxxxxxxx> > Cc: Daniel Vetter <daniel@xxxxxxxx> > Subject: Re: [PATCH 1/1] drm/i915: Adding YUV444 packed format > support for skl+ (V15) > > On Wed, 08 Apr 2020, Jani Nikula <jani.nikula@xxxxxxxxxxxxxxx> wrote: > > On Tue, 07 Apr 2020, Bob Paauwe <bob.j.paauwe@xxxxxxxxx> wrote: > >> From: Stanislav Lisovskiy <stanislav.lisovskiy@xxxxxxxxx> > >> > >> PLANE_CTL_FORMAT_AYUV is already supported, according to hardware > specification. > >> > >> v2: Edited commit message, removed redundant whitespaces. > >> > >> v3: Fixed fallthrough logic for the format switch cases. > >> > >> v4: Yet again fixed fallthrough logic, to reuse code from other case > >> labels. > >> > >> v5: Started to use XYUV instead of AYUV, as we don't use alpha. > >> > >> v6: Removed unneeded initializer for new XYUV format. > >> > >> v7: Added scaling support for DRM_FORMAT_XYUV > >> > >> v8: Edited commit message to be more clear about skl+, renamed > >> PLANE_CTL_FORMAT_AYUV to PLANE_CTL_FORMAT_XYUV as this > format > >> doesn't support per-pixel alpha. Fixed minor code issues. > >> > >> v9: Moved DRM format check to proper place in intel_framebuffer_init. > >> > >> v10: Added missing XYUV format to sprite planes for skl+. > >> > >> v11: Changed DRM_FORMAT_XYUV to be DRM_FORMAT_XYUV8888. > >> > >> v12: Fixed rebase conflicts > >> > >> V13: Rebased. > >> Added format to ICL format lists. > >> > >> V14: Added format to TGL format lists. > >> Rebased. > >> > >> V15: Added format to glk_planar_formats[] and icl_sdr_y_plane_formats[] > (Ville) > >> Placed XYUV8888 before XXVYU2101010 to be more consistent (Ville) > > > > Okay, so we like to add the changelog of the patch itself to the commit > > message, but this is ridiculous wrt the patch and the commit > > message. Whoever ends up applying it, please just nuke the changelog. I > > don't want that in the logs. > > This turned out to be me. Pushed with the commit message cleaned up. > > BR, > Jani. Thanks Jani! What about the corresponding IGT patch? Did that get pushed too so that this won't break CI? https://patchwork.freedesktop.org/series/70516/ Bob > > > > > > BR, > > Jani. > > > > > >> > >> v12: > >> Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > >> Reviewed-by: Matt Roper <matthew.d.roper@xxxxxxxxx> > >> > >> Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@xxxxxxxxx> > >> Signed-off-by: Bob Paauwe <bob.j.paauwe@xxxxxxxxx> > >> --- > >> drivers/gpu/drm/i915/display/intel_display.c | 5 +++++ > >> drivers/gpu/drm/i915/display/intel_sprite.c | 8 ++++++++ > >> drivers/gpu/drm/i915/i915_reg.h | 2 +- > >> 3 files changed, 14 insertions(+), 1 deletion(-) > >> > >> diff --git a/drivers/gpu/drm/i915/display/intel_display.c > b/drivers/gpu/drm/i915/display/intel_display.c > >> index 70ec301fe6e3..3654262570b2 100644 > >> --- a/drivers/gpu/drm/i915/display/intel_display.c > >> +++ b/drivers/gpu/drm/i915/display/intel_display.c > >> @@ -3342,6 +3342,8 @@ int skl_format_to_fourcc(int format, bool > rgb_order, bool alpha) > >> return DRM_FORMAT_RGB565; > >> case PLANE_CTL_FORMAT_NV12: > >> return DRM_FORMAT_NV12; > >> + case PLANE_CTL_FORMAT_XYUV: > >> + return DRM_FORMAT_XYUV8888; > >> case PLANE_CTL_FORMAT_P010: > >> return DRM_FORMAT_P010; > >> case PLANE_CTL_FORMAT_P012: > >> @@ -4586,6 +4588,8 @@ static u32 skl_plane_ctl_format(u32 > pixel_format) > >> case DRM_FORMAT_XRGB16161616F: > >> case DRM_FORMAT_ARGB16161616F: > >> return PLANE_CTL_FORMAT_XRGB_16161616F; > >> + case DRM_FORMAT_XYUV8888: > >> + return PLANE_CTL_FORMAT_XYUV; > >> case DRM_FORMAT_YUYV: > >> return PLANE_CTL_FORMAT_YUV422 | > PLANE_CTL_YUV422_YUYV; > >> case DRM_FORMAT_YVYU: > >> @@ -6175,6 +6179,7 @@ static int skl_update_scaler_plane(struct > intel_crtc_state *crtc_state, > >> case DRM_FORMAT_UYVY: > >> case DRM_FORMAT_VYUY: > >> case DRM_FORMAT_NV12: > >> + case DRM_FORMAT_XYUV8888: > >> case DRM_FORMAT_P010: > >> case DRM_FORMAT_P012: > >> case DRM_FORMAT_P016: > >> diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c > b/drivers/gpu/drm/i915/display/intel_sprite.c > >> index deda351719db..1a4377c988f5 100644 > >> --- a/drivers/gpu/drm/i915/display/intel_sprite.c > >> +++ b/drivers/gpu/drm/i915/display/intel_sprite.c > >> @@ -2503,6 +2503,7 @@ static const u32 skl_plane_formats[] = { > >> DRM_FORMAT_YVYU, > >> DRM_FORMAT_UYVY, > >> DRM_FORMAT_VYUY, > >> + DRM_FORMAT_XYUV8888, > >> }; > >> > >> static const u32 skl_planar_formats[] = { > >> @@ -2521,6 +2522,7 @@ static const u32 skl_planar_formats[] = { > >> DRM_FORMAT_UYVY, > >> DRM_FORMAT_VYUY, > >> DRM_FORMAT_NV12, > >> + DRM_FORMAT_XYUV8888, > >> }; > >> > >> static const u32 glk_planar_formats[] = { > >> @@ -2539,6 +2541,7 @@ static const u32 glk_planar_formats[] = { > >> DRM_FORMAT_UYVY, > >> DRM_FORMAT_VYUY, > >> DRM_FORMAT_NV12, > >> + DRM_FORMAT_XYUV8888, > >> DRM_FORMAT_P010, > >> DRM_FORMAT_P012, > >> DRM_FORMAT_P016, > >> @@ -2562,6 +2565,7 @@ static const u32 icl_sdr_y_plane_formats[] = { > >> DRM_FORMAT_Y210, > >> DRM_FORMAT_Y212, > >> DRM_FORMAT_Y216, > >> + DRM_FORMAT_XYUV8888, > >> DRM_FORMAT_XVYU2101010, > >> DRM_FORMAT_XVYU12_16161616, > >> DRM_FORMAT_XVYU16161616, > >> @@ -2589,6 +2593,7 @@ static const u32 icl_sdr_uv_plane_formats[] = { > >> DRM_FORMAT_Y210, > >> DRM_FORMAT_Y212, > >> DRM_FORMAT_Y216, > >> + DRM_FORMAT_XYUV8888, > >> DRM_FORMAT_XVYU2101010, > >> DRM_FORMAT_XVYU12_16161616, > >> DRM_FORMAT_XVYU16161616, > >> @@ -2620,6 +2625,7 @@ static const u32 icl_hdr_plane_formats[] = { > >> DRM_FORMAT_Y210, > >> DRM_FORMAT_Y212, > >> DRM_FORMAT_Y216, > >> + DRM_FORMAT_XYUV8888, > >> DRM_FORMAT_XVYU2101010, > >> DRM_FORMAT_XVYU12_16161616, > >> DRM_FORMAT_XVYU16161616, > >> @@ -2790,6 +2796,7 @@ static bool > skl_plane_format_mod_supported(struct drm_plane *_plane, > >> case DRM_FORMAT_UYVY: > >> case DRM_FORMAT_VYUY: > >> case DRM_FORMAT_NV12: > >> + case DRM_FORMAT_XYUV8888: > >> case DRM_FORMAT_P010: > >> case DRM_FORMAT_P012: > >> case DRM_FORMAT_P016: > >> @@ -2854,6 +2861,7 @@ static bool > gen12_plane_format_mod_supported(struct drm_plane *_plane, > >> case DRM_FORMAT_UYVY: > >> case DRM_FORMAT_VYUY: > >> case DRM_FORMAT_NV12: > >> + case DRM_FORMAT_XYUV8888: > >> case DRM_FORMAT_P010: > >> case DRM_FORMAT_P012: > >> case DRM_FORMAT_P016: > >> diff --git a/drivers/gpu/drm/i915/i915_reg.h > b/drivers/gpu/drm/i915/i915_reg.h > >> index 1a7bd6db164b..70c02e73e1d8 100644 > >> --- a/drivers/gpu/drm/i915/i915_reg.h > >> +++ b/drivers/gpu/drm/i915/i915_reg.h > >> @@ -6855,7 +6855,7 @@ enum { > >> #define PLANE_CTL_FORMAT_P012 (5 << 24) > >> #define PLANE_CTL_FORMAT_XRGB_16161616F (6 << 24) > >> #define PLANE_CTL_FORMAT_P016 (7 << 24) > >> -#define PLANE_CTL_FORMAT_AYUV (8 << 24) > >> +#define PLANE_CTL_FORMAT_XYUV (8 << 24) > >> #define PLANE_CTL_FORMAT_INDEXED (12 << 24) > >> #define PLANE_CTL_FORMAT_RGB_565 (14 << 24) > >> #define ICL_PLANE_CTL_FORMAT_MASK (0x1f << 23) > > -- > Jani Nikula, Intel Open Source Graphics Center _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
