The WOPCM is not a uC-specific resource, but the only use-case we have
for it on the SW side is the programming of the related registers for
GuC/HuC DMA, everything else is HW-managed. Given that the wopcm init
functions are already heavily uC focused (to the point that they skip
on HW that doesn't have GuC/HuC), it makes sense to stop pretending we
handle WOPCM as a global resource and just focus on the part we care
about. Therefore, we can move the init functions inside gt/uc and
consolidate all the uC WOPCM functions inside the same file.
As part of the move, the initialization has been slightly simplified,
including dropping a check on FW fetch to verify that the FW blob is not
bigger that the whole WOPCM. This means that in the extremely unlikely
case we do have a FW that is too big (why would we ever ship a FW that
can't be loaded?) we might underflow in our partitioning math, but we're
still safe due to the check we perform when we verify the partitioning
after we're done with the calculations. Note that this is not a
regression given that even now we might underflow if the binary is close
to the size of the WOPCM due to adding the reserved regions to the mix.
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@xxxxxxxxx>
Cc: Michal Wajdeczko <michal.wajdeczko@xxxxxxxxx>
---
Documentation/gpu/i915.rst | 2 +-
drivers/gpu/drm/i915/Makefile | 4 +-
drivers/gpu/drm/i915/gt/intel_ggtt.c | 2 +-
drivers/gpu/drm/i915/gt/uc/intel_uc.c | 67 +--------
drivers/gpu/drm/i915/gt/uc/intel_uc.h | 25 ++++
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 11 --
.../{intel_wopcm.c => gt/uc/intel_uc_wopcm.c} | 141 ++++++++++++------
drivers/gpu/drm/i915/i915_drv.c | 2 -
drivers/gpu/drm/i915/i915_drv.h | 3 -
drivers/gpu/drm/i915/i915_gem.c | 2 +-
drivers/gpu/drm/i915/intel_wopcm.h | 60 --------
11 files changed, 128 insertions(+), 191 deletions(-)
rename drivers/gpu/drm/i915/{intel_wopcm.c => gt/uc/intel_uc_wopcm.c} (71%)
delete mode 100644 drivers/gpu/drm/i915/intel_wopcm.h
diff --git a/Documentation/gpu/i915.rst b/Documentation/gpu/i915.rst
index 429b08aac797..28c396a18574 100644
--- a/Documentation/gpu/i915.rst
+++ b/Documentation/gpu/i915.rst
@@ -430,7 +430,7 @@ WOPCM
WOPCM Layout
~~~~~~~~~~~~
-.. kernel-doc:: drivers/gpu/drm/i915/intel_wopcm.c
+.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_uc_wopcm.c
:doc: WOPCM Layout
GuC
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 2fce8b0040f3..c35d5e827836 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -162,13 +162,13 @@ i915-y += \
i915_scheduler.o \
i915_trace_points.o \
i915_vma.o \
- intel_region_lmem.o \
- intel_wopcm.o
+ intel_region_lmem.o
# general-purpose microcontroller (GuC) support
i915-y += gt/uc/intel_uc.o \
gt/uc/intel_uc_debugfs.o \
gt/uc/intel_uc_fw.o \
+ gt/uc/intel_uc_wopcm.o \
gt/uc/intel_guc.o \
gt/uc/intel_guc_ads.o \
gt/uc/intel_guc_ct.o \
diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c
index eebd1190506f..4a3b82dc2765 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
@@ -506,7 +506,7 @@ static int init_ggtt(struct i915_ggtt *ggtt)
* why.
*/
ggtt->pin_bias = max_t(u32, I915_GTT_PAGE_SIZE,
- intel_wopcm_guc_size(&ggtt->vm.i915->wopcm));
+ intel_uc_wopcm_guc_size(&ggtt->vm.gt->uc));
ret = intel_vgt_balloon(ggtt);
if (ret)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
index f518fe05c6f9..ee3205eefd70 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
@@ -333,69 +333,6 @@ static int __uc_sanitize(struct intel_uc *uc)
return __intel_uc_reset_hw(uc);
}
-/* Initialize and verify the uC regs related to uC positioning in WOPCM */
-static int uc_init_wopcm(struct intel_uc *uc)
-{
- struct intel_gt *gt = uc_to_gt(uc);
- struct intel_uncore *uncore = gt->uncore;
- u32 base = intel_wopcm_guc_base(>->i915->wopcm);
- u32 size = intel_wopcm_guc_size(>->i915->wopcm);
- u32 huc_agent = intel_uc_uses_huc(uc) ? HUC_LOADING_AGENT_GUC : 0;
- u32 mask;
- int err;
-
- if (unlikely(!base || !size)) {
- i915_probe_error(gt->i915, "Unsuccessful WOPCM partitioning\n");
- return -E2BIG;
- }
-
- GEM_BUG_ON(!intel_uc_supports_guc(uc));
- GEM_BUG_ON(!(base & GUC_WOPCM_OFFSET_MASK));
- GEM_BUG_ON(base & ~GUC_WOPCM_OFFSET_MASK);
- GEM_BUG_ON(!(size & GUC_WOPCM_SIZE_MASK));
- GEM_BUG_ON(size & ~GUC_WOPCM_SIZE_MASK);
-
- err = i915_inject_probe_error(gt->i915, -ENXIO);
- if (err)
- return err;
-
- mask = GUC_WOPCM_SIZE_MASK | GUC_WOPCM_SIZE_LOCKED;
- err = intel_uncore_write_and_verify(uncore, GUC_WOPCM_SIZE, size, mask,
- size | GUC_WOPCM_SIZE_LOCKED);
- if (err)
- goto err_out;
-
- mask = GUC_WOPCM_OFFSET_MASK | GUC_WOPCM_OFFSET_VALID | huc_agent;
- err = intel_uncore_write_and_verify(uncore, DMA_GUC_WOPCM_OFFSET,
- base | huc_agent, mask,
- base | huc_agent |
- GUC_WOPCM_OFFSET_VALID);
- if (err)
- goto err_out;
-
- return 0;
-
-err_out:
- i915_probe_error(gt->i915, "Failed to init uC WOPCM registers!\n");
- i915_probe_error(gt->i915, "%s(%#x)=%#x\n", "DMA_GUC_WOPCM_OFFSET",
- i915_mmio_reg_offset(DMA_GUC_WOPCM_OFFSET),
- intel_uncore_read(uncore, DMA_GUC_WOPCM_OFFSET));
- i915_probe_error(gt->i915, "%s(%#x)=%#x\n", "GUC_WOPCM_SIZE",
- i915_mmio_reg_offset(GUC_WOPCM_SIZE),
- intel_uncore_read(uncore, GUC_WOPCM_SIZE));
-
- return err;
-}
-
-static bool uc_is_wopcm_locked(struct intel_uc *uc)
-{
- struct intel_gt *gt = uc_to_gt(uc);
- struct intel_uncore *uncore = gt->uncore;
-
- return (intel_uncore_read(uncore, GUC_WOPCM_SIZE) & GUC_WOPCM_SIZE_LOCKED) ||
- (intel_uncore_read(uncore, DMA_GUC_WOPCM_OFFSET) & GUC_WOPCM_OFFSET_VALID);
-}
-
static int __uc_check_hw(struct intel_uc *uc)
{
if (!intel_uc_supports_guc(uc))
@@ -406,7 +343,7 @@ static int __uc_check_hw(struct intel_uc *uc)
* before on this system after reboot, otherwise we risk GPU hangs.
* To check if GuC was loaded before we look at WOPCM registers.
*/
- if (uc_is_wopcm_locked(uc))
+ if (intel_uc_is_wopcm_locked(uc))
return -EIO;
return 0;
@@ -430,7 +367,7 @@ static int __uc_init_hw(struct intel_uc *uc)
goto err_out;
}
- ret = uc_init_wopcm(uc);
+ ret = intel_uc_init_wopcm(uc);
if (ret)
goto err_out;
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.h b/drivers/gpu/drm/i915/gt/uc/intel_uc.h
index 9c954c589edf..b89363608f9b 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.h
@@ -28,6 +28,12 @@ struct intel_uc {
struct intel_guc guc;
struct intel_huc huc;
+ /* WOPCM partitioning for uc usage */
+ struct {
+ u32 guc_base;
+ u32 guc_size;
+ } wopcm;
+
/* Snapshot of GuC log from last failed load */
struct drm_i915_gem_object *load_err_log;
};
@@ -42,6 +48,25 @@ void intel_uc_runtime_suspend(struct intel_uc *uc);
int intel_uc_resume(struct intel_uc *uc);
int intel_uc_runtime_resume(struct intel_uc *uc);
+void intel_uc_partition_wopcm(struct intel_uc *uc);
+int intel_uc_init_wopcm(struct intel_uc *uc);
+bool intel_uc_is_wopcm_locked(struct intel_uc *uc);
+
+/**
+ * intel_uc_wopcm_guc_size()
+ * @uc: intel_uc structure
+ *
+ * Returns size of the WOPCM shadowed region.
+ *
+ * Returns:
+ * 0 if GuC is not present or not in use.
+ * Otherwise, the GuC WOPCM size.
+ */
+static inline u32 intel_uc_wopcm_guc_size(struct intel_uc *uc)
+{
+ return uc->wopcm.guc_size;
+}
+
/*
* We need to know as early as possible if we're going to use GuC or not to
* take the correct setup paths. Additionally, once we've started loading the
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
index e1caae93996d..ff2130f8ee18 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
@@ -280,7 +280,6 @@ int intel_uc_fw_fetch(struct intel_uc_fw *uc_fw)
size_t size;
int err;
- GEM_BUG_ON(!i915->wopcm.size);
GEM_BUG_ON(!intel_uc_fw_is_enabled(uc_fw));
err = i915_inject_probe_error(i915, -ENXIO);
@@ -340,16 +339,6 @@ int intel_uc_fw_fetch(struct intel_uc_fw *uc_fw)
goto fail;
}
- /* Sanity check whether this fw is not larger than whole WOPCM memory */
- size = __intel_uc_fw_get_upload_size(uc_fw);
- if (unlikely(size >= i915->wopcm.size)) {
- drm_warn(&i915->drm, "%s firmware %s: invalid size: %zu > %zu\n",
- intel_uc_fw_type_repr(uc_fw->type), uc_fw->path,
- size, (size_t)i915->wopcm.size);
- err = -E2BIG;
- goto fail;
- }
-
/* Get version numbers from the CSS header */
uc_fw->major_ver_found = FIELD_GET(CSS_SW_VERSION_UC_MAJOR,
css->sw_version);
diff --git a/drivers/gpu/drm/i915/intel_wopcm.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_wopcm.c
similarity index 71%
rename from drivers/gpu/drm/i915/intel_wopcm.c
rename to drivers/gpu/drm/i915/gt/uc/intel_uc_wopcm.c
index 2186386a45c8..d84a1eb06c8e 100644
--- a/drivers/gpu/drm/i915/intel_wopcm.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_wopcm.c
@@ -3,7 +3,9 @@
* Copyright © 2017-2019 Intel Corporation
*/
-#include "intel_wopcm.h"
+#include "intel_uc.h"
+#include "gt/intel_gt.h"
+
#include "i915_drv.h"
/**
@@ -63,32 +65,6 @@
#define GEN9_GUC_FW_RESERVED SZ_128K
#define GEN9_GUC_WOPCM_OFFSET (GUC_WOPCM_RESERVED + GEN9_GUC_FW_RESERVED)
-static inline struct drm_i915_private *wopcm_to_i915(struct intel_wopcm *wopcm)
-{
- return container_of(wopcm, struct drm_i915_private, wopcm);
-}
-
-/**
- * intel_wopcm_init_early() - Early initialization of the WOPCM.
- * @wopcm: pointer to intel_wopcm.
- *
- * Setup the size of WOPCM which will be used by later on WOPCM partitioning.
- */
-void intel_wopcm_init_early(struct intel_wopcm *wopcm)
-{
- struct drm_i915_private *i915 = wopcm_to_i915(wopcm);
-
- if (!HAS_GT_UC(i915))
- return;
-
- if (INTEL_GEN(i915) >= 11)
- wopcm->size = GEN11_WOPCM_SIZE;
- else
- wopcm->size = GEN9_WOPCM_SIZE;
-
- drm_dbg(&i915->drm, "WOPCM: %uK\n", wopcm->size / 1024);
-}
-
static inline u32 context_reserved_size(struct drm_i915_private *i915)
{
if (IS_GEN9_LP(i915))
@@ -209,8 +185,8 @@ static bool __wopcm_regs_locked(struct intel_uncore *uncore,
}
/**
- * intel_wopcm_init() - Initialize the WOPCM structure.
- * @wopcm: pointer to intel_wopcm.
+ * intel_uc_partition_wopcm() - Initialize WOPCM partitioning for FW loading.
+ * @uc: pointer to intel_uc.
*
* This function will partition WOPCM space based on GuC and HuC firmware sizes
* and will allocate max remaining for use by GuC. This function will also
@@ -218,25 +194,30 @@ static bool __wopcm_regs_locked(struct intel_uncore *uncore,
* size. It will fail the WOPCM init if any of these checks fail, so that the
* following WOPCM registers setup and GuC firmware uploading would be aborted.
*/
-void intel_wopcm_init(struct intel_wopcm *wopcm)
+void intel_uc_partition_wopcm(struct intel_uc *uc)
{
- struct drm_i915_private *i915 = wopcm_to_i915(wopcm);
- struct intel_gt *gt = &i915->gt;
+ struct intel_gt *gt = uc_to_gt(uc);
+ struct drm_i915_private *i915 = gt->i915;
u32 guc_fw_size = intel_uc_fw_get_upload_size(>->uc.guc.fw);
u32 huc_fw_size = intel_uc_fw_get_upload_size(>->uc.huc.fw);
u32 ctx_rsvd = context_reserved_size(i915);
+ u32 wopcm_size;
u32 guc_wopcm_base;
u32 guc_wopcm_size;
if (!guc_fw_size)
return;
- GEM_BUG_ON(!wopcm->size);
- GEM_BUG_ON(wopcm->guc.base);
- GEM_BUG_ON(wopcm->guc.size);
- GEM_BUG_ON(guc_fw_size >= wopcm->size);
- GEM_BUG_ON(huc_fw_size >= wopcm->size);
- GEM_BUG_ON(ctx_rsvd + WOPCM_RESERVED_SIZE >= wopcm->size);
+ if (INTEL_GEN(i915) >= 11)
+ wopcm_size = GEN11_WOPCM_SIZE;
+ else
+ wopcm_size = GEN9_WOPCM_SIZE;
+
+ drm_dbg(&i915->drm, "WOPCM: %uK\n", wopcm_size / 1024);
+
+ GEM_BUG_ON(uc->wopcm.guc_base);
+ GEM_BUG_ON(uc->wopcm.guc_size);
+ GEM_BUG_ON(ctx_rsvd + WOPCM_RESERVED_SIZE >= wopcm_size);
if (i915_inject_probe_failure(i915))
return;
@@ -258,21 +239,91 @@ void intel_wopcm_init(struct intel_wopcm *wopcm)
* Need to clamp guc_wopcm_base now to make sure the following math is
* correct. Formal check of whole WOPCM layout will be done below.
*/
- guc_wopcm_base = min(guc_wopcm_base, wopcm->size - ctx_rsvd);
+ guc_wopcm_base = min(guc_wopcm_base, wopcm_size - ctx_rsvd);
/* Aligned remainings of usable WOPCM space can be assigned to GuC. */
- guc_wopcm_size = wopcm->size - ctx_rsvd - guc_wopcm_base;
+ guc_wopcm_size = wopcm_size - ctx_rsvd - guc_wopcm_base;
guc_wopcm_size &= GUC_WOPCM_SIZE_MASK;
drm_dbg(&i915->drm, "Calculated GuC WOPCM [%uK, %uK)\n",
guc_wopcm_base / SZ_1K, guc_wopcm_size / SZ_1K);
check:
- if (__check_layout(i915, wopcm->size, guc_wopcm_base, guc_wopcm_size,
+ if (__check_layout(i915, wopcm_size, guc_wopcm_base, guc_wopcm_size,
guc_fw_size, huc_fw_size)) {
- wopcm->guc.base = guc_wopcm_base;
- wopcm->guc.size = guc_wopcm_size;
- GEM_BUG_ON(!wopcm->guc.base);
- GEM_BUG_ON(!wopcm->guc.size);
+ uc->wopcm.guc_base = guc_wopcm_base;
+ uc->wopcm.guc_size = guc_wopcm_size;
+ GEM_BUG_ON(!uc->wopcm.guc_base);
+ GEM_BUG_ON(!uc->wopcm.guc_size);
+ }
+}
+
+/**
+ * intel_uc_init_wopcm() - setup uC WOPCM registers ahead of FW loading.
+ * @uc: pointer to intel_uc.
+ *
+ * Initialize and verify the uC regs related to uC positioning in WOPCM
+ *
+ * Return: 0 if successful, negative errno code on failure.
+ */
+int intel_uc_init_wopcm(struct intel_uc *uc)
+{
+ struct intel_gt *gt = uc_to_gt(uc);
+ struct intel_uncore *uncore = gt->uncore;
+ u32 base = uc->wopcm.guc_base;
+ u32 size = uc->wopcm.guc_size;
+ u32 huc_agent = intel_uc_uses_huc(uc) ? HUC_LOADING_AGENT_GUC : 0;
+ u32 mask;
+ int err;
+
+ if (unlikely(!base || !size)) {
+ i915_probe_error(gt->i915, "Unsuccessful WOPCM partitioning\n");
+ return -E2BIG;
}
+
+ GEM_BUG_ON(!intel_uc_supports_guc(uc));
+ GEM_BUG_ON(!(base & GUC_WOPCM_OFFSET_MASK));
+ GEM_BUG_ON(base & ~GUC_WOPCM_OFFSET_MASK);
+ GEM_BUG_ON(!(size & GUC_WOPCM_SIZE_MASK));
+ GEM_BUG_ON(size & ~GUC_WOPCM_SIZE_MASK);
+
+ err = i915_inject_probe_error(gt->i915, -ENXIO);
+ if (err)
+ return err;
+
+ mask = GUC_WOPCM_SIZE_MASK | GUC_WOPCM_SIZE_LOCKED;
+ err = intel_uncore_write_and_verify(uncore, GUC_WOPCM_SIZE, size, mask,
+ size | GUC_WOPCM_SIZE_LOCKED);
+ if (err)
+ goto err_out;
+
+ mask = GUC_WOPCM_OFFSET_MASK | GUC_WOPCM_OFFSET_VALID | huc_agent;
+ err = intel_uncore_write_and_verify(uncore, DMA_GUC_WOPCM_OFFSET,
+ base | huc_agent, mask,
+ base | huc_agent |
+ GUC_WOPCM_OFFSET_VALID);
+ if (err)
+ goto err_out;
+
+ return 0;
+
+err_out:
+ i915_probe_error(gt->i915, "Failed to init uC WOPCM registers!\n");
+ i915_probe_error(gt->i915, "%s(%#x)=%#x\n", "DMA_GUC_WOPCM_OFFSET",
+ i915_mmio_reg_offset(DMA_GUC_WOPCM_OFFSET),
+ intel_uncore_read(uncore, DMA_GUC_WOPCM_OFFSET));
+ i915_probe_error(gt->i915, "%s(%#x)=%#x\n", "GUC_WOPCM_SIZE",
+ i915_mmio_reg_offset(GUC_WOPCM_SIZE),
+ intel_uncore_read(uncore, GUC_WOPCM_SIZE));
+
+ return err;
+}
+
+bool intel_uc_is_wopcm_locked(struct intel_uc *uc)
+{
+ struct intel_gt *gt = uc_to_gt(uc);
+ struct intel_uncore *uncore = gt->uncore;
+
+ return (intel_uncore_read(uncore, GUC_WOPCM_SIZE) & GUC_WOPCM_SIZE_LOCKED) ||
+ (intel_uncore_read(uncore, DMA_GUC_WOPCM_OFFSET) & GUC_WOPCM_OFFSET_VALID);
}
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index a7a3b4b98572..ab623fef3884 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -451,8 +451,6 @@ static int i915_driver_early_probe(struct drm_i915_private *dev_priv)
if (ret < 0)
goto err_workqueues;
- intel_wopcm_init_early(&dev_priv->wopcm);
-
intel_gt_init_early(&dev_priv->gt, dev_priv);
i915_gem_init_early(dev_priv);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index e9ee4daa9320..d346a20e8708 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -89,7 +89,6 @@
#include "intel_memory_region.h"
#include "intel_uncore.h"
#include "intel_wakeref.h"
-#include "intel_wopcm.h"
#include "i915_gem.h"
#include "i915_gem_gtt.h"
@@ -860,8 +859,6 @@ struct drm_i915_private {
struct intel_gvt *gvt;
- struct intel_wopcm wopcm;
-
struct intel_csr csr;
struct intel_gmbus gmbus[GMBUS_NUM_PINS];
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 0cbcb9f54e7d..eafd015a2dc5 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1105,7 +1105,7 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
return ret;
intel_uc_fetch_firmwares(&dev_priv->gt.uc);
- intel_wopcm_init(&dev_priv->wopcm);
+ intel_uc_partition_wopcm(&dev_priv->gt.uc);
ret = i915_init_ggtt(dev_priv);
if (ret) {
diff --git a/drivers/gpu/drm/i915/intel_wopcm.h b/drivers/gpu/drm/i915/intel_wopcm.h
deleted file mode 100644
index 17d6aa86008a..000000000000
--- a/drivers/gpu/drm/i915/intel_wopcm.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
- * SPDX-License-Identifier: MIT
- *
- * Copyright © 2017-2018 Intel Corporation
- */
-
-#ifndef _INTEL_WOPCM_H_
-#define _INTEL_WOPCM_H_
-
-#include <linux/types.h>
-
-/**
- * struct intel_wopcm - Overall WOPCM info and WOPCM regions.
- * @size: Size of overall WOPCM.
- * @guc: GuC WOPCM Region info.
- * @guc.base: GuC WOPCM base which is offset from WOPCM base.
- * @guc.size: Size of the GuC WOPCM region.
- */
-struct intel_wopcm {
- u32 size;
- struct {
- u32 base;
- u32 size;
- } guc;
-};
-
-/**
- * intel_wopcm_guc_base()
- * @wopcm: intel_wopcm structure
- *
- * Returns the base of the WOPCM shadowed region.
- *
- * Returns:
- * 0 if GuC is not present or not in use.
- * Otherwise, the GuC WOPCM base.
- */
-static inline u32 intel_wopcm_guc_base(struct intel_wopcm *wopcm)
-{
- return wopcm->guc.base;
-}
-
-/**
- * intel_wopcm_guc_size()
- * @wopcm: intel_wopcm structure
- *
- * Returns size of the WOPCM shadowed region.
- *
- * Returns:
- * 0 if GuC is not present or not in use.
- * Otherwise, the GuC WOPCM size.
- */
-static inline u32 intel_wopcm_guc_size(struct intel_wopcm *wopcm)
-{
- return wopcm->guc.size;
-}
-
-void intel_wopcm_init_early(struct intel_wopcm *wopcm);
-void intel_wopcm_init(struct intel_wopcm *wopcm);
-
-#endif
--
2.24.1
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