On Mon, Apr 06, 2020 at 06:11:50PM -0700, José Roberto de Souza wrote: > Moving the code to return the digital port of the aux channel also > removing the intel_phy_is_tc() to make it generic. > digital_port will be needed in icl_tc_phy_aux_power_well_enable() > so adding it as a parameter to icl_tc_port_assert_ref_held(). > > While at at removing the duplicated call to icl_tc_phy_aux_ch() in > icl_tc_port_assert_ref_held(). > > v2: > - fixed build when DRM_I915_DEBUG_RUNTIME_PM is not set > - moved to before hsw_wait_for_power_well_enable() as it will be > needed by hsw_wait_for_power_well_enable() in a future patch > > Cc: You-Sheng Yang <vicamo@xxxxxxxxx> > Signed-off-by: José Roberto de Souza <jose.souza@xxxxxxxxx> > --- > .../drm/i915/display/intel_display_power.c | 69 ++++++++++--------- > 1 file changed, 37 insertions(+), 32 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c > index 433e5a81dd4d..f2f42b5960df 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_power.c > +++ b/drivers/gpu/drm/i915/display/intel_display_power.c > @@ -282,6 +282,33 @@ static void hsw_power_well_pre_disable(struct drm_i915_private *dev_priv, > gen8_irq_power_well_pre_disable(dev_priv, irq_pipe_mask); > } > > +static struct intel_digital_port * > +aux_ch_to_digital_port(struct drm_i915_private *dev_priv, > + enum aux_ch aux_ch) > +{ > + struct intel_digital_port *dig_port = NULL; > + struct intel_encoder *encoder; > + > + for_each_intel_encoder(&dev_priv->drm, encoder) { > + /* We'll check the MST primary port */ > + if (encoder->type == INTEL_OUTPUT_DP_MST) > + continue; > + > + dig_port = enc_to_dig_port(encoder); > + if (drm_WARN_ON(&dev_priv->drm, !dig_port)) This would not work on non-digital port encoders (DSI), so just if (!dig_port) With that fixed: Reviewed-by: Imre Deak <imre.deak@xxxxxxxxx> > + continue; > + > + if (dig_port->aux_ch != aux_ch) { > + dig_port = NULL; > + continue; > + } > + > + break; > + } > + > + return dig_port; > +} > + > static void hsw_wait_for_power_well_enable(struct drm_i915_private *dev_priv, > struct i915_power_well *power_well) > { > @@ -501,41 +528,14 @@ static int power_well_async_ref_count(struct drm_i915_private *dev_priv, > } > > static void icl_tc_port_assert_ref_held(struct drm_i915_private *dev_priv, > - struct i915_power_well *power_well) > + struct i915_power_well *power_well, > + struct intel_digital_port *dig_port) > { > - enum aux_ch aux_ch = icl_tc_phy_aux_ch(dev_priv, power_well); > - struct intel_digital_port *dig_port = NULL; > - struct intel_encoder *encoder; > - > /* Bypass the check if all references are released asynchronously */ > if (power_well_async_ref_count(dev_priv, power_well) == > power_well->count) > return; > > - aux_ch = icl_tc_phy_aux_ch(dev_priv, power_well); > - > - for_each_intel_encoder(&dev_priv->drm, encoder) { > - enum phy phy = intel_port_to_phy(dev_priv, encoder->port); > - > - if (!intel_phy_is_tc(dev_priv, phy)) > - continue; > - > - /* We'll check the MST primary port */ > - if (encoder->type == INTEL_OUTPUT_DP_MST) > - continue; > - > - dig_port = enc_to_dig_port(encoder); > - if (drm_WARN_ON(&dev_priv->drm, !dig_port)) > - continue; > - > - if (dig_port->aux_ch != aux_ch) { > - dig_port = NULL; > - continue; > - } > - > - break; > - } > - > if (drm_WARN_ON(&dev_priv->drm, !dig_port)) > return; > > @@ -545,7 +545,8 @@ static void icl_tc_port_assert_ref_held(struct drm_i915_private *dev_priv, > #else > > static void icl_tc_port_assert_ref_held(struct drm_i915_private *dev_priv, > - struct i915_power_well *power_well) > + struct i915_power_well *power_well, > + struct intel_digital_port *dig_port) > { > } > > @@ -558,9 +559,10 @@ icl_tc_phy_aux_power_well_enable(struct drm_i915_private *dev_priv, > struct i915_power_well *power_well) > { > enum aux_ch aux_ch = icl_tc_phy_aux_ch(dev_priv, power_well); > + struct intel_digital_port *dig_port = aux_ch_to_digital_port(dev_priv, aux_ch); > u32 val; > > - icl_tc_port_assert_ref_held(dev_priv, power_well); > + icl_tc_port_assert_ref_held(dev_priv, power_well, dig_port); > > val = intel_de_read(dev_priv, DP_AUX_CH_CTL(aux_ch)); > val &= ~DP_AUX_CH_CTL_TBT_IO; > @@ -588,7 +590,10 @@ static void > icl_tc_phy_aux_power_well_disable(struct drm_i915_private *dev_priv, > struct i915_power_well *power_well) > { > - icl_tc_port_assert_ref_held(dev_priv, power_well); > + enum aux_ch aux_ch = icl_tc_phy_aux_ch(dev_priv, power_well); > + struct intel_digital_port *dig_port = aux_ch_to_digital_port(dev_priv, aux_ch); > + > + icl_tc_port_assert_ref_held(dev_priv, power_well, dig_port); > > hsw_power_well_disable(dev_priv, power_well); > } > -- > 2.26.0 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx