== Series Details == Series: Consider DBuf bandwidth when calculating CDCLK (rev8) URL : https://patchwork.freedesktop.org/series/74739/ State : warning == Summary == $ dim checkpatch origin/drm-tip a2d97b3a68fc drm/i915: Decouple cdclk calculation from modeset checks 9fe9c8a12e97 drm/i915: Force recalculate min_cdclk if planes config changed 460156f3ab0b drm/i915: Introduce for_each_dbuf_slice_in_mask macro -:24: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__slice' - possible side-effects? #24: FILE: drivers/gpu/drm/i915/display/intel_display.h:190: +#define for_each_dbuf_slice_in_mask(__slice, __mask) \ + for ((__slice) = DBUF_S1; (__slice) < I915_MAX_DBUF_SLICES; (__slice)++) \ + for_each_if((BIT(__slice)) & (__mask)) total: 0 errors, 0 warnings, 1 checks, 20 lines checked d94782227906 drm/i915: Adjust CDCLK accordingly to our DBuf bw needs 20fd5967e21b drm/i915: Remove unneeded hack now for CDCLK _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
