On Wed, 2020-04-01 at 15:18 +0800, You-Sheng Yang wrote:
> On 2020-04-01 08:41, José Roberto de Souza wrote:
> > Moving the code to return the digital port of the aux channel also
> > removing the intel_phy_is_tc() to make it generic.
> > digital_port will be needed in icl_tc_phy_aux_power_well_enable()
> > so adding it as a parameter to icl_tc_port_assert_ref_held().
> >
> > While at at removing the duplicated call to icl_tc_phy_aux_ch() in
> > icl_tc_port_assert_ref_held().
> >
> > Signed-off-by: José Roberto de Souza <jose.souza@xxxxxxxxx>
> > ---
> > .../drm/i915/display/intel_display_power.c | 38 ++++++++++-----
> > ----
> > 1 file changed, 21 insertions(+), 17 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c
> > b/drivers/gpu/drm/i915/display/intel_display_power.c
> > index 433e5a81dd4d..02a07aa710e4 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> > @@ -500,26 +500,14 @@ static int power_well_async_ref_count(struct
> > drm_i915_private *dev_priv,
> > return refs;
> > }
> >
> > -static void icl_tc_port_assert_ref_held(struct drm_i915_private
> > *dev_priv,
> > - struct i915_power_well
> > *power_well)
> > +static struct intel_digital_port *
> > +aux_ch_to_digital_port(struct drm_i915_private *dev_priv,
> > + enum aux_ch aux_ch)
>
> This fails the build because icl_tc_port_assert_ref_held was
> originally
> guarded by CONFIG_DRM_I915_DEBUG_RUNTIME_PM, but now
> aux_ch_to_digital_port maybe used outside the scope.
Thanks, fixed.
>
> > {
> > - enum aux_ch aux_ch = icl_tc_phy_aux_ch(dev_priv, power_well);
> > struct intel_digital_port *dig_port = NULL;
> > struct intel_encoder *encoder;
> >
> > - /* Bypass the check if all references are released
> > asynchronously */
> > - if (power_well_async_ref_count(dev_priv, power_well) ==
> > - power_well->count)
> > - return;
> > -
> > - aux_ch = icl_tc_phy_aux_ch(dev_priv, power_well);
> > -
> > for_each_intel_encoder(&dev_priv->drm, encoder) {
> > - enum phy phy = intel_port_to_phy(dev_priv, encoder-
> > >port);
> > -
> > - if (!intel_phy_is_tc(dev_priv, phy))
> > - continue;
> > -
> > /* We'll check the MST primary port */
> > if (encoder->type == INTEL_OUTPUT_DP_MST)
> > continue;
> > @@ -536,6 +524,18 @@ static void icl_tc_port_assert_ref_held(struct
> > drm_i915_private *dev_priv,
> > break;
> > }
> >
> > + return dig_port;
> > +}
> > +
> > +static void icl_tc_port_assert_ref_held(struct drm_i915_private
> > *dev_priv,
> > + struct i915_power_well
> > *power_well,
> > + struct intel_digital_port
> > *dig_port)
> > +{
> > + /* Bypass the check if all references are released
> > asynchronously */
> > + if (power_well_async_ref_count(dev_priv, power_well) ==
> > + power_well->count)
> > + return;
> > +
> > if (drm_WARN_ON(&dev_priv->drm, !dig_port))
> > return;
> >
> > @@ -558,9 +558,10 @@ icl_tc_phy_aux_power_well_enable(struct
> > drm_i915_private *dev_priv,
> > struct i915_power_well *power_well)
> > {
> > enum aux_ch aux_ch = icl_tc_phy_aux_ch(dev_priv, power_well);
> > + struct intel_digital_port *dig_port =
> > aux_ch_to_digital_port(dev_priv, aux_ch);
>
> E.g. here.
>
> > u32 val;
> >
> > - icl_tc_port_assert_ref_held(dev_priv, power_well);
> > + icl_tc_port_assert_ref_held(dev_priv, power_well, dig_port);
> >
> > val = intel_de_read(dev_priv, DP_AUX_CH_CTL(aux_ch));
> > val &= ~DP_AUX_CH_CTL_TBT_IO;
> > @@ -588,7 +589,10 @@ static void
> > icl_tc_phy_aux_power_well_disable(struct drm_i915_private
> > *dev_priv,
> > struct i915_power_well *power_well)
> > {
> > - icl_tc_port_assert_ref_held(dev_priv, power_well);
> > + enum aux_ch aux_ch = icl_tc_phy_aux_ch(dev_priv, power_well);
> > + struct intel_digital_port *dig_port =
> > aux_ch_to_digital_port(dev_priv, aux_ch);
> > +
> > + icl_tc_port_assert_ref_held(dev_priv, power_well, dig_port);
> >
> > hsw_power_well_disable(dev_priv, power_well);
> > }
> >
>
> You-Sheng Yang
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
