On Wed, Mar 18, 2020 at 03:34:38PM -0700, Manasi Navare wrote:
> On Fri, Mar 13, 2020 at 06:48:20PM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> >
> > This port sync enable/disable stuff is misplaced. It's just another step
> > of the normal TRANS_DDI_FUNC_CTL enable. Move it to its natural place.
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> > ---
> > drivers/gpu/drm/i915/display/intel_ddi.c | 71 +++++++++++---------
> > drivers/gpu/drm/i915/display/intel_display.c | 34 ----------
> > 2 files changed, 39 insertions(+), 66 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> > index 73d0f4648c06..8d486282eea3 100644
> > --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> > @@ -1558,12 +1558,34 @@ void intel_ddi_enable_transcoder_func(const struct intel_crtc_state *crtc_state)
> > struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> > enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> > - u32 temp;
> > + u32 ctl;
> >
> > - temp = intel_ddi_transcoder_func_reg_val_get(crtc_state);
> > + if (INTEL_GEN(dev_priv) >= 11) {
> > + enum transcoder master_transcoder = crtc_state->master_transcoder;
> > + u32 ctl2 = 0;
> > +
> > + if (master_transcoder != INVALID_TRANSCODER) {
> > + u8 master_select;
> > +
> > + if (master_transcoder == TRANSCODER_EDP)
> > + master_select = 0;
> > + else
> > + master_select = master_transcoder + 1;
> > +
> > + ctl2 |= PORT_SYNC_MODE_ENABLE |
> > + (PORT_SYNC_MODE_MASTER_SELECT(master_select) &
> > + PORT_SYNC_MODE_MASTER_SELECT_MASK) <<
> > + PORT_SYNC_MODE_MASTER_SELECT_SHIFT;
> > + }
> > +
> > + intel_de_write(dev_priv,
> > + TRANS_DDI_FUNC_CTL2(crtc_state->cpu_transcoder), ctl2);
> > + }
> > +
> > + ctl = intel_ddi_transcoder_func_reg_val_get(crtc_state);
> > if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST))
> > - temp |= TRANS_DDI_DP_VC_PAYLOAD_ALLOC;
> > - intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder), temp);
> > + ctl |= TRANS_DDI_DP_VC_PAYLOAD_ALLOC;
> > + intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder), ctl);
> > }
> >
> > /*
> > @@ -1576,11 +1598,11 @@ intel_ddi_config_transcoder_func(const struct intel_crtc_state *crtc_state)
> > struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> > enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> > - u32 temp;
> > + u32 ctl;
> >
> > - temp = intel_ddi_transcoder_func_reg_val_get(crtc_state);
> > - temp &= ~TRANS_DDI_FUNC_ENABLE;
> > - intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder), temp);
> > + ctl = intel_ddi_transcoder_func_reg_val_get(crtc_state);
> > + ctl &= ~TRANS_DDI_FUNC_ENABLE;
> > + intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder), ctl);
> > }
> >
> > void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state)
> > @@ -1588,20 +1610,23 @@ void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state
> > struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> > enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> > - u32 val;
> > + u32 ctl;
> >
> > - val = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder));
> > - val &= ~TRANS_DDI_FUNC_ENABLE;
> > + if (INTEL_GEN(dev_priv) >= 11)
> > + intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL2(cpu_transcoder), 0);
>
> This should be set to 0 only for the slave where we enable the port sync mode so
> set it to 0 only if if (old_crtc_state->master_transcoder != INVALID_TRANSCODER)
>
> This will just ensure that we dont accidently set it to 0 for non slave transcoders
No, we should just write the value we want for every transcoder. If
there are bits in there that should be set then we should set them
explicitly. But I didn't think there's anything we want to set.
>
> Manasi
>
> > +
> > + ctl = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder));
> > + ctl &= ~TRANS_DDI_FUNC_ENABLE;
> >
> > if (INTEL_GEN(dev_priv) >= 12) {
> > if (!intel_dp_mst_is_master_trans(crtc_state)) {
> > - val &= ~(TGL_TRANS_DDI_PORT_MASK |
> > + ctl &= ~(TGL_TRANS_DDI_PORT_MASK |
> > TRANS_DDI_MODE_SELECT_MASK);
> > }
> > } else {
> > - val &= ~(TRANS_DDI_PORT_MASK | TRANS_DDI_MODE_SELECT_MASK);
> > + ctl &= ~(TRANS_DDI_PORT_MASK | TRANS_DDI_MODE_SELECT_MASK);
> > }
> > - intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder), val);
> > + intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder), ctl);
> >
> > if (dev_priv->quirks & QUIRK_INCREASE_DDI_DISABLED_TIME &&
> > intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {
> > @@ -3405,21 +3430,6 @@ static void intel_ddi_post_disable_hdmi(struct intel_encoder *encoder,
> > intel_dp_dual_mode_set_tmds_output(intel_hdmi, false);
> > }
> >
> > -static void icl_disable_transcoder_port_sync(const struct intel_crtc_state *old_crtc_state)
> > -{
> > - struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);
> > - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> > -
> > - if (old_crtc_state->master_transcoder == INVALID_TRANSCODER)
> > - return;
> > -
> > - DRM_DEBUG_KMS("Disabling Transcoder Port Sync on Slave Transcoder %s\n",
> > - transcoder_name(old_crtc_state->cpu_transcoder));
> > -
> > - intel_de_write(dev_priv,
> > - TRANS_DDI_FUNC_CTL2(old_crtc_state->cpu_transcoder), 0);
> > -}
> > -
> > static void intel_ddi_post_disable(struct intel_encoder *encoder,
> > const struct intel_crtc_state *old_crtc_state,
> > const struct drm_connector_state *old_conn_state)
> > @@ -3434,9 +3444,6 @@ static void intel_ddi_post_disable(struct intel_encoder *encoder,
> >
> > intel_disable_pipe(old_crtc_state);
> >
> > - if (INTEL_GEN(dev_priv) >= 11)
> > - icl_disable_transcoder_port_sync(old_crtc_state);
> > -
> > intel_ddi_disable_transcoder_func(old_crtc_state);
> >
> > intel_dsc_disable(old_crtc_state);
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > index 8f23c4d51c33..c49b4e6eb3d4 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -4998,37 +4998,6 @@ static void icl_set_pipe_chicken(struct intel_crtc *crtc)
> > intel_de_write(dev_priv, PIPE_CHICKEN(pipe), tmp);
> > }
> >
> > -static void icl_enable_trans_port_sync(const struct intel_crtc_state *crtc_state)
> > -{
> > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> > - u32 trans_ddi_func_ctl2_val;
> > - u8 master_select;
> > -
> > - /*
> > - * Configure the master select and enable Transcoder Port Sync for
> > - * Slave CRTCs transcoder.
> > - */
> > - if (crtc_state->master_transcoder == INVALID_TRANSCODER)
> > - return;
> > -
> > - if (crtc_state->master_transcoder == TRANSCODER_EDP)
> > - master_select = 0;
> > - else
> > - master_select = crtc_state->master_transcoder + 1;
> > -
> > - /* Set the master select bits for Tranascoder Port Sync */
> > - trans_ddi_func_ctl2_val = (PORT_SYNC_MODE_MASTER_SELECT(master_select) &
> > - PORT_SYNC_MODE_MASTER_SELECT_MASK) <<
> > - PORT_SYNC_MODE_MASTER_SELECT_SHIFT;
> > - /* Enable Transcoder Port Sync */
> > - trans_ddi_func_ctl2_val |= PORT_SYNC_MODE_ENABLE;
> > -
> > - intel_de_write(dev_priv,
> > - TRANS_DDI_FUNC_CTL2(crtc_state->cpu_transcoder),
> > - trans_ddi_func_ctl2_val);
> > -}
> > -
> > static void intel_fdi_normal_train(struct intel_crtc *crtc)
> > {
> > struct drm_device *dev = crtc->base.dev;
> > @@ -7037,9 +7006,6 @@ static void hsw_crtc_enable(struct intel_atomic_state *state,
> > if (!transcoder_is_dsi(cpu_transcoder))
> > intel_set_pipe_timings(new_crtc_state);
> >
> > - if (INTEL_GEN(dev_priv) >= 11)
> > - icl_enable_trans_port_sync(new_crtc_state);
> > -
> > intel_set_pipe_src_size(new_crtc_state);
> >
> > if (cpu_transcoder != TRANSCODER_EDP &&
> > --
> > 2.24.1
> >
--
Ville Syrjälä
Intel
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