On Tue, Mar 10, 2020 at 06:23:38PM +0200, Kai Vehmanen wrote:
> Gen12 hardware supports HDMI audio pixel clocks of 296.7/297Mhz
> and 593.4/594Mhz. Add the missing rates and add logic to ignore
> them if running on older hardware.
>
> Bspec: 49333
> Signed-off-by: Kai Vehmanen <kai.vehmanen@xxxxxxxxxxxxxxx>
> Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
Thanks. Pushed to dinq.
> ---
> drivers/gpu/drm/i915/display/intel_audio.c | 8 ++++++++
> drivers/gpu/drm/i915/i915_reg.h | 4 ++++
> 2 files changed, 12 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_audio.c b/drivers/gpu/drm/i915/display/intel_audio.c
> index 19bf206037c2..62f234f641de 100644
> --- a/drivers/gpu/drm/i915/display/intel_audio.c
> +++ b/drivers/gpu/drm/i915/display/intel_audio.c
> @@ -149,6 +149,10 @@ static const struct {
> { 74250, AUD_CONFIG_PIXEL_CLOCK_HDMI_74250 },
> { 148352, AUD_CONFIG_PIXEL_CLOCK_HDMI_148352 },
> { 148500, AUD_CONFIG_PIXEL_CLOCK_HDMI_148500 },
> + { 296703, AUD_CONFIG_PIXEL_CLOCK_HDMI_296703 },
> + { 297000, AUD_CONFIG_PIXEL_CLOCK_HDMI_297000 },
> + { 593407, AUD_CONFIG_PIXEL_CLOCK_HDMI_593407 },
> + { 594000, AUD_CONFIG_PIXEL_CLOCK_HDMI_594000 },
> };
>
> /* HDMI N/CTS table */
> @@ -234,6 +238,7 @@ static const struct hdmi_aud_ncts hdmi_aud_ncts_36bpp[] = {
> /* get AUD_CONFIG_PIXEL_CLOCK_HDMI_* value for mode */
> static u32 audio_config_hdmi_pixel_clock(const struct intel_crtc_state *crtc_state)
> {
> + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
> const struct drm_display_mode *adjusted_mode =
> &crtc_state->hw.adjusted_mode;
> int i;
> @@ -243,6 +248,9 @@ static u32 audio_config_hdmi_pixel_clock(const struct intel_crtc_state *crtc_sta
> break;
> }
>
> + if (INTEL_GEN(dev_priv) < 12 && adjusted_mode->crtc_clock > 148500)
> + i = ARRAY_SIZE(hdmi_audio_clock);
> +
> if (i == ARRAY_SIZE(hdmi_audio_clock)) {
> DRM_DEBUG_KMS("HDMI audio pixel clock setting for %d not found, falling back to defaults\n",
> adjusted_mode->crtc_clock);
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 79ae9654dac9..ee4a75ac9186 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -9251,6 +9251,10 @@ enum {
> #define AUD_CONFIG_PIXEL_CLOCK_HDMI_74250 (7 << 16)
> #define AUD_CONFIG_PIXEL_CLOCK_HDMI_148352 (8 << 16)
> #define AUD_CONFIG_PIXEL_CLOCK_HDMI_148500 (9 << 16)
> +#define AUD_CONFIG_PIXEL_CLOCK_HDMI_296703 (10 << 16)
> +#define AUD_CONFIG_PIXEL_CLOCK_HDMI_297000 (11 << 16)
> +#define AUD_CONFIG_PIXEL_CLOCK_HDMI_593407 (12 << 16)
> +#define AUD_CONFIG_PIXEL_CLOCK_HDMI_594000 (13 << 16)
> #define AUD_CONFIG_DISABLE_NCTS (1 << 3)
>
> /* HSW Audio */
> --
> 2.17.1
--
Ville Syrjälä
Intel
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