Allow 3-display pipes SKU system with any combination in INTEL_INFO pipe mask. B.Spec:50075 changes since RFC: - using intel_pipe_mask_is_valid() function to check integrity of pipe_mask. [Ville] v2: - simplify condition in intel_pipe_mask_is_valid(). [Ville] v3: - removed non-contiguous pipe fusing check. [Lucas] Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> Cc: Lucas De Marchi <lucas.demarchi@xxxxxxxxx> Signed-off-by: Anshuman Gupta <anshuman.gupta@xxxxxxxxx> --- drivers/gpu/drm/i915/intel_device_info.c | 12 +----------- 1 file changed, 1 insertion(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c index d7fe12734db8..9ff89e142ff1 100644 --- a/drivers/gpu/drm/i915/intel_device_info.c +++ b/drivers/gpu/drm/i915/intel_device_info.c @@ -998,17 +998,7 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv) (dfsm & TGL_DFSM_PIPE_D_DISABLE)) enabled_mask &= ~BIT(PIPE_D); - /* - * At least one pipe should be enabled and if there are - * disabled pipes, they should be the last ones, with no holes - * in the mask. - */ - if (enabled_mask == 0 || !is_power_of_2(enabled_mask + 1)) - drm_err(&dev_priv->drm, - "invalid pipe fuse configuration: enabled_mask=0x%x\n", - enabled_mask); - else - info->pipe_mask = enabled_mask; + info->pipe_mask = enabled_mask; if (dfsm & SKL_DFSM_DISPLAY_HDCP_DISABLE) info->display.has_hdcp = 0; -- 2.25.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
