Note that we used to have this implemented on ICL under a different number (Wa_1604302699), but it was removed because it vanished from the bspec and the register update didn't seem to be sticking. However the initial implementation of the workaround appears to have been in the wrong place (not handled as an engine workaround) and might behave better now that we've had various other updates to our multicast register handling. References: f545425a0145 ("drm/i915/icl: Remove Wa_1604302699") Signed-off-by: Matt Roper <matthew.d.roper@xxxxxxxxx> --- drivers/gpu/drm/i915/gt/intel_workarounds.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c index a539157dd571..5e009ee070dc 100644 --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c @@ -1495,6 +1495,10 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal) wa_write_or(wal, GEN7_FF_THREAD_MODE, GEN12_FF_TESSELATION_DOP_GATE_DISABLE); + + /* Wa_1409178092:icl,ehl */ + wa_write_or(wal, GEN10_L3_CHICKEN_MODE_REGISTER, + GEN11_I2M_WRITE_DISABLE); } if (IS_GEN_RANGE(i915, 9, 12)) { -- 2.24.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx