Just as a comment, u8 for max_vfreq in struct drm_adaptive_sync_info might be not very future proof? I just read that ASUS announced a "TUF Gaming VG259QM" monitor which seems to have an adaptive sync range of 48 Hz to 280 Hz, exceeding the max 255 Hz of u8? -mario On Fri, Mar 6, 2020 at 4:02 PM Kazlauskas, Nicholas <nicholas.kazlauskas@xxxxxxx> wrote: > > On 2020-03-05 8:42 p.m., Manasi Navare wrote: > > Adaptive Sync is a VESA feature so add a DRM core helper to parse > > the EDID's detailed descritors to obtain the adaptive sync monitor range. > > Store this info as part fo drm_display_info so it can be used > > across all drivers. > > This part of the code is stripped out of amdgpu's function > > amdgpu_dm_update_freesync_caps() to make it generic and be used > > across all DRM drivers > > > > v4: > > * Use is_display_descriptor() (Ville) > > * Name the monitor range flags (Ville) > > v3: > > * Remove the edid parsing restriction for just DP (Nicholas) > > * Use drm_for_each_detailed_block (Ville) > > * Make the drm_get_adaptive_sync_range function static (Harry, Jani) > > v2: > > * Change vmin and vmax to use u8 (Ville) > > * Dont store pixel clock since that is just a max dotclock > > and not related to VRR mode (Manasi) > > > > Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > Cc: Harry Wentland <harry.wentland@xxxxxxx> > > Cc: Clinton A Taylor <clinton.a.taylor@xxxxxxxxx> > > Cc: Kazlauskas Nicholas <Nicholas.Kazlauskas@xxxxxxx> > > Signed-off-by: Manasi Navare <manasi.d.navare@xxxxxxxxx> > > Looks good to me now. I'm fine with whether we want to rename the flags > or not, I don't have much of a preference either way. > > Series is: > > Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@xxxxxxx> > > Regards, > Nicholas Kazlauskas > > > --- > > drivers/gpu/drm/drm_edid.c | 44 +++++++++++++++++++++++++++++++++++++ > > include/drm/drm_connector.h | 22 +++++++++++++++++++ > > 2 files changed, 66 insertions(+) > > > > diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c > > index ad41764a4ebe..61ed544d9535 100644 > > --- a/drivers/gpu/drm/drm_edid.c > > +++ b/drivers/gpu/drm/drm_edid.c > > @@ -4938,6 +4938,47 @@ static void drm_parse_cea_ext(struct drm_connector *connector, > > } > > } > > > > +static > > +void get_adaptive_sync_range(struct detailed_timing *timing, > > + void *info_adaptive_sync) > > +{ > > + struct drm_adaptive_sync_info *adaptive_sync = info_adaptive_sync; > > + const struct detailed_non_pixel *data = &timing->data.other_data; > > + const struct detailed_data_monitor_range *range = &data->data.range; > > + > > + if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_MONITOR_RANGE)) > > + return; > > + > > + /* > > + * Check for flag range limits only. If flag == 1 then > > + * no additional timing information provided. > > + * Default GTF, GTF Secondary curve and CVT are not > > + * supported > > + */ > > + if (range->flags != EDID_RANGE_LIMITS_ONLY_FLAG) > > + return; > > + > > + adaptive_sync->min_vfreq = range->min_vfreq; > > + adaptive_sync->max_vfreq = range->max_vfreq; > > +} > > + > > +static > > +void drm_get_adaptive_sync_range(struct drm_connector *connector, > > + const struct edid *edid) > > +{ > > + struct drm_display_info *info = &connector->display_info; > > + > > + if (!version_greater(edid, 1, 1)) > > + return; > > + > > + drm_for_each_detailed_block((u8 *)edid, get_adaptive_sync_range, > > + &info->adaptive_sync); > > + > > + DRM_DEBUG_KMS("Adaptive Sync refresh rate range is %d Hz - %d Hz\n", > > + info->adaptive_sync.min_vfreq, > > + info->adaptive_sync.max_vfreq); > > +} > > + > > /* A connector has no EDID information, so we've got no EDID to compute quirks from. Reset > > * all of the values which would have been set from EDID > > */ > > @@ -4960,6 +5001,7 @@ drm_reset_display_info(struct drm_connector *connector) > > memset(&info->hdmi, 0, sizeof(info->hdmi)); > > > > info->non_desktop = 0; > > + memset(&info->adaptive_sync, 0, sizeof(info->adaptive_sync)); > > } > > > > u32 drm_add_display_info(struct drm_connector *connector, const struct edid *edid) > > @@ -4975,6 +5017,8 @@ u32 drm_add_display_info(struct drm_connector *connector, const struct edid *edi > > > > info->non_desktop = !!(quirks & EDID_QUIRK_NON_DESKTOP); > > > > + drm_get_adaptive_sync_range(connector, edid); > > + > > DRM_DEBUG_KMS("non_desktop set to %d\n", info->non_desktop); > > > > if (edid->revision < 3) > > diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h > > index 0df7a95ca5d9..2b22c0fa42c4 100644 > > --- a/include/drm/drm_connector.h > > +++ b/include/drm/drm_connector.h > > @@ -254,6 +254,23 @@ enum drm_panel_orientation { > > DRM_MODE_PANEL_ORIENTATION_RIGHT_UP, > > }; > > > > +/** > > + * struct drm_adaptive_sync_info - Panel's Adaptive Sync capabilities for > > + * &drm_display_info > > + * > > + * This struct is used to store a Panel's Adaptive Sync capabilities > > + * as parsed from EDID's detailed monitor range descriptor block. > > + * > > + * @min_vfreq: This is the min supported refresh rate in Hz from > > + * EDID's detailed monitor range. > > + * @max_vfreq: This is the max supported refresh rate in Hz from > > + * EDID's detailed monitor range > > + */ > > +struct drm_adaptive_sync_info { > > + u8 min_vfreq; > > + u8 max_vfreq; > > +}; > > + > > /* > > * This is a consolidated colorimetry list supported by HDMI and > > * DP protocol standard. The respective connectors will register > > @@ -473,6 +490,11 @@ struct drm_display_info { > > * @non_desktop: Non desktop display (HMD). > > */ > > bool non_desktop; > > + > > + /** > > + * @adaptive_sync: Adaptive Sync capabilities of the DP/eDP sink > > + */ > > + struct drm_adaptive_sync_info adaptive_sync; > > }; > > > > int drm_display_info_set_bus_formats(struct drm_display_info *info, > > > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx