On Mon, Mar 02, 2020 at 03:14:21PM -0800, José Roberto de Souza wrote: > Following the changes in the previous patch > "drm/i915/gen11: Moving WAs to rcs_engine_wa_init()" also moving TGL > Wa_1408615072 to rcs_engine_wa_init() this way after a engine > reset it will be reapplied also restricting it to B0 as it is fixed in > B0 stepping. I think you meant to say "restricting it to *A0* as it is fixed in B0?" Aside from that, Reviewed-by: Matt Roper <matthew.d.roper@xxxxxxxxx> > > BSpec: 52890 > Cc: Matt Roper <matthew.d.roper@xxxxxxxxx> > Signed-off-by: José Roberto de Souza <jose.souza@xxxxxxxxx> > --- > drivers/gpu/drm/i915/gt/intel_workarounds.c | 4 ++++ > drivers/gpu/drm/i915/intel_pm.c | 4 ---- > 2 files changed, 4 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c > index 90e1c48dd6be..cb7d85c42f13 100644 > --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c > +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c > @@ -1380,6 +1380,10 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal) > * Wa_14010229206:tgl > */ > wa_masked_en(wal, GEN9_ROW_CHICKEN4, GEN12_DISABLE_TDL_PUSH); > + > + /* Wa_1408615072:tgl */ > + wa_masked_en(wal, UNSLICE_UNIT_LEVEL_CLKGATE2, > + VSUNIT_CLKGATE_DIS_TGL); > } > > if (IS_TIGERLAKE(i915)) { > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index d3df00445787..e7f36ebc282d 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -6792,10 +6792,6 @@ static void tgl_init_clock_gating(struct drm_i915_private *dev_priv) > u32 vd_pg_enable = 0; > unsigned int i; > > - /* Wa_1408615072:tgl */ > - intel_uncore_rmw(&dev_priv->uncore, UNSLICE_UNIT_LEVEL_CLKGATE2, > - 0, VSUNIT_CLKGATE_DIS_TGL); > - > /* This is not a WA. Enable VD HCP & MFX_ENC powergate */ > for (i = 0; i < I915_MAX_VCS; i++) { > if (HAS_ENGINE(dev_priv, _VCS(i))) > -- > 2.25.1 > -- Matt Roper Graphics Software Engineer VTT-OSGC Platform Enablement Intel Corporation (916) 356-2795 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx