FYI: For compute shaders, we have a bit in INTERFACE_DESCRIPTOR_DATA for this which we can set from userspace without whitelisting a register. If drivers can't handle mid-thread, they should just set that bit. Unless we can mid-thread preempt media or 3D which don't have such a bit in which case maybe we need to do something in the kernel. --Jason On Wed, Mar 6, 2019 at 5:20 AM Joonas Lahtinen <joonas.lahtinen@xxxxxxxxxxxxxxx> wrote: > > Quoting Chris Wilson (2019-03-05 21:10:42) > > Quoting Rafael Antognolli (2019-03-05 17:30:00) > > > On Tue, Mar 05, 2019 at 01:48:26PM +0100, Michał Winiarski wrote: > > > > We assumed that the default preemption granularity is fine for ICL. > > > > Unfortunately, it turns out that some drivers don't support mid-thread > > > > preemption for compute workloads. > > > > If a workload that doesn't support mid-thread preemption gets mid-thread > > > > preempted, we're going to observe a GPU hang. > > > > While I'm here, let's also update the "workaround" naming. > > > > > > Yeah, in Mesa we are not implementing the SIP, so we can't do > > > thread-level preemption yet and need the granularity to be no higher > > > than thread group level. > > > > > > Acked-by: Rafael Antognolli <rafael.antognolli@xxxxxxxxx> > > > > > > > Signed-off-by: Michał Winiarski <michal.winiarski@xxxxxxxxx> > > > > Cc: Anuj Phogat <anuj.phogat@xxxxxxxxx> > > > > Cc: Joonas Lahtinen <joonas.lahtinen@xxxxxxxxxxxxxxx> > > > > Cc: Matt Roper <matthew.d.roper@xxxxxxxxx> > > > > Cc: Rafael Antognolli <rafael.antognolli@xxxxxxxxx> > > > > Tested-by: Anuj Phogat <anuj.phogat@xxxxxxxxx> > > > > Reviewed-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> > > > > And pushed, thanks everyone for the testing and reviewed. I've held off > > on pushing the second patch as we just want to double check that the > > whitelisting is required. > > Yeah, we should only need to push it once there is an actual consumer > that will enable it. > > Regards, Joonas > > > -Chris > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx