Re: [PATCH v2 2/2] drm/i915/perf: introduce global sseu pinning

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On 02/03/2020 12:31, Lionel Landwerlin wrote:
On Gen11 powergating half the execution units is a functional
requirement when using the VME samplers. Not fullfilling this
requirement can lead to hangs.

This unfortunately plays fairly poorly with the NOA requirements. NOA
requires a stable power configuration to maintain its configuration.

As a result using OA (and NOA feeding into it) so far has required us
to use a power configuration that can work for all contexts. The only
power configuration fullfilling this is powergating half the execution
units.

This makes performance analysis for 3D workloads somewhat pointless.

Failing to find a solution that would work for everybody, this change
introduces a new i915-perf stream open parameter that punts the
decision off to userspace. If this parameter is omitted, the existing
Gen11 behavior remains (half EU array powergating).

This change takes the initiative to move all perf related sseu
configuration into i915_perf.c

v2: Make parameter priviliged if different from default


Just uploaded the Mesa changes for this :

https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4021

The IGT tests are here :

https://patchwork.freedesktop.org/series/74111/


Cheers,


-Lionel


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