On Thu, Feb 27, 2020 at 02:00:58PM -0800, José Roberto de Souza wrote: > Different issues with the same fix, so justing adding > Wa_1409142259, Wa_1409252684, Wa_1409217633, Wa_1409207793, > Wa_1409178076 and 1408979724 to the comment so other devs can check if > this Was were implemetend with a simple grep. > > Signed-off-by: José Roberto de Souza <jose.souza@xxxxxxxxx> Reviewed-by: Matt Roper <matthew.d.roper@xxxxxxxxx> > --- > drivers/gpu/drm/i915/gt/intel_workarounds.c | 10 +++++++++- > 1 file changed, 9 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c > index 0cdd3c50e0ae..ba0265763484 100644 > --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c > +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c > @@ -580,7 +580,15 @@ static void icl_ctx_workarounds_init(struct intel_engine_cs *engine, > static void tgl_ctx_workarounds_init(struct intel_engine_cs *engine, > struct i915_wa_list *wal) > { > - /* Wa_1409142259:tgl */ > + /* > + * Wa_1409142259:tgl > + * Wa_1409347922:tgl > + * Wa_1409252684:tgl > + * Wa_1409217633:tgl > + * Wa_1409207793:tgl > + * Wa_1409178076:tgl > + * Wa_1408979724:tgl > + */ > WA_SET_BIT_MASKED(GEN11_COMMON_SLICE_CHICKEN3, > GEN12_DISABLE_CPS_AWARE_COLOR_PIPE); > > -- > 2.25.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Matt Roper Graphics Software Engineer VTT-OSGC Platform Enablement Intel Corporation (916) 356-2795 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx