On Tue, 2020-02-25 at 19:11 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
>
> Encapsulate the dbuf state more by moving the pre/post
> plane functions out from intel_display.c. We stick them
> into intel_pm.c since that's where the rest of the code
> lives for now.
>
> Eventually we should add a new file for this stuff at which
> point we also need to decide if it makes sense to even split
> the wm code from the ddb code, or to keep them together.
Yes, that definitely makes sense. May be we should one day,
add a separate file for wm/ddb/dbuf management, because intel_pm.c
seems to me a bit _overloaded_ with functionality right now.
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@xxxxxxxxx>
>
> Cc: Stanislav Lisovskiy <stanislav.lisovskiy@xxxxxxxxx>
> Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 41 +-----------------
> --
> drivers/gpu/drm/i915/intel_pm.c | 37 ++++++++++++++++++
> drivers/gpu/drm/i915/intel_pm.h | 2 +
> 3 files changed, 41 insertions(+), 39 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 659b952c8e2f..6e96756f9a69 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -15291,43 +15291,6 @@ static void
> intel_update_trans_port_sync_crtcs(struct intel_crtc *crtc,
> state);
> }
>
> -static void icl_dbuf_slice_pre_update(struct intel_atomic_state
> *state)
> -{
> - struct drm_i915_private *dev_priv = to_i915(state->base.dev);
> - const struct intel_dbuf_state *new_dbuf_state =
> - intel_atomic_get_new_dbuf_state(state);
> - const struct intel_dbuf_state *old_dbuf_state =
> - intel_atomic_get_old_dbuf_state(state);
> -
> - if (!new_dbuf_state ||
> - new_dbuf_state->enabled_slices == old_dbuf_state-
> >enabled_slices)
> - return;
> -
> - WARN_ON(!new_dbuf_state->base.changed);
> -
> - gen9_dbuf_slices_update(dev_priv,
> - old_dbuf_state->enabled_slices |
> - new_dbuf_state->enabled_slices);
> -}
> -
> -static void icl_dbuf_slice_post_update(struct intel_atomic_state
> *state)
> -{
> - struct drm_i915_private *dev_priv = to_i915(state->base.dev);
> - const struct intel_dbuf_state *new_dbuf_state =
> - intel_atomic_get_new_dbuf_state(state);
> - const struct intel_dbuf_state *old_dbuf_state =
> - intel_atomic_get_old_dbuf_state(state);
> -
> - if (!new_dbuf_state ||
> - new_dbuf_state->enabled_slices == old_dbuf_state-
> >enabled_slices)
> - return;
> -
> - WARN_ON(!new_dbuf_state->base.changed);
> -
> - gen9_dbuf_slices_update(dev_priv,
> - new_dbuf_state->enabled_slices);
> -}
> -
> static void skl_commit_modeset_enables(struct intel_atomic_state
> *state)
> {
> struct drm_i915_private *dev_priv = to_i915(state->base.dev);
> @@ -15580,7 +15543,7 @@ static void intel_atomic_commit_tail(struct
> intel_atomic_state *state)
> if (state->modeset)
> intel_encoders_update_prepare(state);
>
> - icl_dbuf_slice_pre_update(state);
> + intel_dbuf_pre_plane_update(state);
>
> /* Now enable the clocks, plane, pipe, and connectors that we
> set up. */
> dev_priv->display.commit_modeset_enables(state);
> @@ -15635,7 +15598,7 @@ static void intel_atomic_commit_tail(struct
> intel_atomic_state *state)
> dev_priv->display.optimize_watermarks(state,
> crtc);
> }
>
> - icl_dbuf_slice_post_update(state);
> + intel_dbuf_post_plane_update(state);
>
> for_each_oldnew_intel_crtc_in_state(state, crtc,
> old_crtc_state, new_crtc_state, i) {
> intel_post_plane_update(state, crtc);
> diff --git a/drivers/gpu/drm/i915/intel_pm.c
> b/drivers/gpu/drm/i915/intel_pm.c
> index 87f88ea6b7ae..de2822e5c62c 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -7553,3 +7553,40 @@ int intel_dbuf_init(struct drm_i915_private
> *dev_priv)
>
> return 0;
> }
> +
> +void intel_dbuf_pre_plane_update(struct intel_atomic_state *state)
> +{
> + struct drm_i915_private *dev_priv = to_i915(state->base.dev);
> + const struct intel_dbuf_state *new_dbuf_state =
> + intel_atomic_get_new_dbuf_state(state);
> + const struct intel_dbuf_state *old_dbuf_state =
> + intel_atomic_get_old_dbuf_state(state);
> +
> + if (!new_dbuf_state ||
> + new_dbuf_state->enabled_slices == old_dbuf_state-
> >enabled_slices)
> + return;
> +
> + WARN_ON(!new_dbuf_state->base.changed);
> +
> + gen9_dbuf_slices_update(dev_priv,
> + old_dbuf_state->enabled_slices |
> + new_dbuf_state->enabled_slices);
> +}
> +
> +void intel_dbuf_post_plane_update(struct intel_atomic_state *state)
> +{
> + struct drm_i915_private *dev_priv = to_i915(state->base.dev);
> + const struct intel_dbuf_state *new_dbuf_state =
> + intel_atomic_get_new_dbuf_state(state);
> + const struct intel_dbuf_state *old_dbuf_state =
> + intel_atomic_get_old_dbuf_state(state);
> +
> + if (!new_dbuf_state ||
> + new_dbuf_state->enabled_slices == old_dbuf_state-
> >enabled_slices)
> + return;
> +
> + WARN_ON(!new_dbuf_state->base.changed);
> +
> + gen9_dbuf_slices_update(dev_priv,
> + new_dbuf_state->enabled_slices);
> +}
> diff --git a/drivers/gpu/drm/i915/intel_pm.h
> b/drivers/gpu/drm/i915/intel_pm.h
> index 1054a0ab1e40..8204d6a5526c 100644
> --- a/drivers/gpu/drm/i915/intel_pm.h
> +++ b/drivers/gpu/drm/i915/intel_pm.h
> @@ -79,5 +79,7 @@ intel_atomic_get_dbuf_state(struct
> intel_atomic_state *state);
> to_intel_dbuf_state(intel_atomic_get_new_global_obj_state(state
> , &to_i915(state->base.dev)->dbuf.obj))
>
> int intel_dbuf_init(struct drm_i915_private *dev_priv);
> +void intel_dbuf_pre_plane_update(struct intel_atomic_state *state);
> +void intel_dbuf_post_plane_update(struct intel_atomic_state *state);
>
> #endif /* __INTEL_PM_H__ */
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