On Tue, 25 Feb 2020, Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> wrote:
> These were used to set various timeouts for the reset procedure
> (deciding when the engine was dead, and even if the reset itself was not
> making forward progress). No longer used.
>
> Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
\o/
Reviewed-by: Jani Nikula <jani.nikula@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 6 ------
> 1 file changed, 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index de1f1cbcc41d..6b56f31c850f 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -611,12 +611,6 @@ struct i915_gem_mm {
> #define I915_IDLE_ENGINES_TIMEOUT (200) /* in ms */
>
> unsigned long i915_fence_timeout(const struct drm_i915_private *i915);
> -#define I915_RESET_TIMEOUT (10 * HZ) /* 10s */
> -
> -#define I915_ENGINE_DEAD_TIMEOUT (4 * HZ) /* Seqno, head and subunits dead */
> -#define I915_SEQNO_DEAD_TIMEOUT (12 * HZ) /* Seqno dead with active head */
> -
> -#define I915_ENGINE_WEDGED_TIMEOUT (60 * HZ) /* Reset but no recovery? */
>
> /* Amount of SAGV/QGV points, BSpec precisely defines this */
> #define I915_NUM_QGV_POINTS 8
--
Jani Nikula, Intel Open Source Graphics Center
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