Re: [PATCH 8/8] drm/i915/tgl: Extend Wa_1409767108 to B0

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On Fri, Feb 21, 2020 at 06:08:15PM -0800, José Roberto de Souza wrote:
> This Wa will also be needed by B0 stepping.
> 
> BSpec: 52890
> Signed-off-by: José Roberto de Souza <jose.souza@xxxxxxxxx>

Same question as patch #1 --- does the bspec's stepping for display
workarounds reflect the CPU+GT stepping or the display stepping?  If
it's the display stepping, then I believe we should already be covered.


Matt

> ---
>  drivers/gpu/drm/i915/display/intel_display_power.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> index 8ba68ec6dc24..e9af21c08ff6 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -4982,7 +4982,7 @@ static void tgl_bw_buddy_init(struct drm_i915_private *dev_priv)
>  	const struct buddy_page_mask *table;
>  	int i;
>  
> -	if (IS_TGL_REVID(dev_priv, TGL_REVID_A0, TGL_REVID_A0))
> +	if (IS_TGL_REVID(dev_priv, TGL_REVID_A0, TGL_REVID_B0))
>  		/* Wa_1409767108: tgl */
>  		table = wa_1409767108_buddy_page_masks;
>  	else
> -- 
> 2.25.1
> 
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-- 
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795
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