When roll over detected for seq_num_m, we shouldn't continue with stream management with rolled over value. So we are terminating the stream management retry, on roll over of the seq_num_m. v2: using drm_dbg_kms instead of DRM_DEBUG_KMS [Anshuman] v3: dev_priv is used as i915 [JaniN] v4: roll over of seq_num_m detected at the start of stream management. Signed-off-by: Ramalingam C <ramalingam.c@xxxxxxxxx> --- drivers/gpu/drm/i915/display/intel_hdcp.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c index b24d12efae0a..f4b1dd1e62e7 100644 --- a/drivers/gpu/drm/i915/display/intel_hdcp.c +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c @@ -1391,6 +1391,13 @@ int _hdcp2_propagate_stream_management_info(struct intel_connector *connector) const struct intel_hdcp_shim *shim = hdcp->shim; int ret; + /* + * seq_num_m roll over is possible only when dynamic update of + * content type is supported. But implementing as per the spec. + */ + if (hdcp->seq_num_m > HDCP_2_2_SEQ_NUM_MAX) + return -1; + /* Prepare RepeaterAuth_Stream_Manage msg */ msgs.stream_manage.msg_id = HDCP_2_2_REP_STREAM_MANAGE; drm_hdcp_cpu_to_be24(msgs.stream_manage.seq_num_m, hdcp->seq_num_m); @@ -1419,11 +1426,6 @@ int _hdcp2_propagate_stream_management_info(struct intel_connector *connector) err_exit: hdcp->seq_num_m++; - if (hdcp->seq_num_m > HDCP_2_2_SEQ_NUM_MAX) { - DRM_DEBUG_KMS("seq_num_m roll over.\n"); - ret = -1; - } - return ret; } @@ -1618,8 +1620,11 @@ hdcp2_propagate_stream_management_info(struct intel_connector *connector) for (i = 0; i < tries; i++) { ret = _hdcp2_propagate_stream_management_info(connector); - if (!ret) + if (!ret || connector->hdcp.seq_num_m > HDCP_2_2_SEQ_NUM_MAX) { + if (connector->hdcp.seq_num_m > HDCP_2_2_SEQ_NUM_MAX) + drm_dbg_kms(&i915->drm, "seq_num_m roll over.\n"); break; + } drm_dbg_kms(&i915->drm, "HDCP2 stream management %d of %d Failed.(%d)\n", -- 2.20.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx