For DGFX devices, the MOCS control value is not initialized or used.
Update the selftest to skip reading and checking control values
for these devices.
References: e6e2ac07118b ("drm/i915: do not set MOCS control values on dgfx")
Fixes: 3fb33cd32ffd ("drm/i915/selftests: Add coverage of mocs registers")
Signed-off-by: Brian Welty <brian.welty@xxxxxxxxx>
---
drivers/gpu/drm/i915/gt/selftest_mocs.c | 22 +++++++++++-----------
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/selftest_mocs.c b/drivers/gpu/drm/i915/gt/selftest_mocs.c
index de1f83100fb6..8a94a546d580 100644
--- a/drivers/gpu/drm/i915/gt/selftest_mocs.c
+++ b/drivers/gpu/drm/i915/gt/selftest_mocs.c
@@ -199,7 +199,7 @@ static int check_l3cc_table(struct intel_engine_cs *engine,
return 0;
}
-static int check_mocs_engine(struct live_mocs *arg,
+static int check_mocs_engine(struct intel_gt *gt, struct live_mocs *arg,
struct intel_context *ce)
{
struct i915_vma *vma = arg->scratch;
@@ -222,7 +222,7 @@ static int check_mocs_engine(struct live_mocs *arg,
/* Read the mocs tables back using SRM */
offset = i915_ggtt_offset(vma);
- if (!err)
+ if (!err && !IS_DGFX(gt->i915))
err = read_mocs_table(rq, &arg->table, &offset);
if (!err && ce->engine->class == RENDER_CLASS)
err = read_l3cc_table(rq, &arg->table, &offset);
@@ -235,7 +235,7 @@ static int check_mocs_engine(struct live_mocs *arg,
/* Compare the results against the expected tables */
vaddr = arg->vaddr;
- if (!err)
+ if (!err && !IS_DGFX(gt->i915))
err = check_mocs_table(ce->engine, &arg->table, &vaddr);
if (!err && ce->engine->class == RENDER_CLASS)
err = check_l3cc_table(ce->engine, &arg->table, &vaddr);
@@ -262,7 +262,7 @@ static int live_mocs_kernel(void *arg)
for_each_engine(engine, gt, id) {
intel_engine_pm_get(engine);
- err = check_mocs_engine(&mocs, engine->kernel_context);
+ err = check_mocs_engine(gt, &mocs, engine->kernel_context);
intel_engine_pm_put(engine);
if (err)
break;
@@ -295,7 +295,7 @@ static int live_mocs_clean(void *arg)
break;
}
- err = check_mocs_engine(&mocs, ce);
+ err = check_mocs_engine(gt, &mocs, ce);
intel_context_put(ce);
if (err)
break;
@@ -332,7 +332,7 @@ static int active_engine_reset(struct intel_context *ce,
return err;
}
-static int __live_mocs_reset(struct live_mocs *mocs,
+static int __live_mocs_reset(struct intel_gt *gt, struct live_mocs *mocs,
struct intel_context *ce)
{
int err;
@@ -341,7 +341,7 @@ static int __live_mocs_reset(struct live_mocs *mocs,
if (err)
return err;
- err = check_mocs_engine(mocs, ce);
+ err = check_mocs_engine(gt, mocs, ce);
if (err)
return err;
@@ -349,13 +349,13 @@ static int __live_mocs_reset(struct live_mocs *mocs,
if (err)
return err;
- err = check_mocs_engine(mocs, ce);
+ err = check_mocs_engine(gt, mocs, ce);
if (err)
return err;
- intel_gt_reset(ce->engine->gt, ce->engine->mask, "mocs");
+ intel_gt_reset(gt, ce->engine->mask, "mocs");
- err = check_mocs_engine(mocs, ce);
+ err = check_mocs_engine(gt, mocs, ce);
if (err)
return err;
@@ -390,7 +390,7 @@ static int live_mocs_reset(void *arg)
}
intel_engine_pm_get(engine);
- err = __live_mocs_reset(&mocs, ce);
+ err = __live_mocs_reset(gt, &mocs, ce);
intel_engine_pm_put(engine);
intel_context_put(ce);
--
2.20.1
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