On Mon, 2020-02-10 at 13:32 +0200, Jani Nikula wrote:
> On Wed, 05 Feb 2020, Jani Nikula <jani.nikula@xxxxxxxxx> wrote:
> > Commit 21fd23ac222f ("drm/i915: move pipe, pch and vblank enable to
> > encoders on DDI platforms") pushed pipe and vblank enable to
> > encoders on
> > DDI platforms, however it missed the DP MST encoder. Fix it.
> >
> > Fixes: 21fd23ac222f ("drm/i915: move pipe, pch and vblank enable to
> > encoders on DDI platforms")
> > Cc: Vandita Kulkarni <vandita.kulkarni@xxxxxxxxx>
> > Cc: Ville Syrjala <ville.syrjala@xxxxxxxxxxxxxxx>
> > Reported-by: Stanislav Lisovskiy <stanislav.lisovskiy@xxxxxxxxx>
> > Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx>
>
> Thanks for the reviews and testing, pushed to dinq.
>
> I don't usually cut corners, but I've made an exception and pushed
> this
> without full IGT results.
>
> It's been 5 days since the patch was posted, the sharded run has
> fallen
> between the cracks, and the queue is currently about three days. IMHO
> it's intolerable for any patch, but especially so for a regression
> fix
> that was posted within hours of the bug report.
Absolutely agree, since we already had a regression, it's pointless
now to wait longer with such a trivial fix. We are anyway in a bad
situation now, checking also some other MST issues and having to apply
this patch manually first in order to get at least this issue ruled
out.
Stan
>
> BR,
> Jani.
>
>
> > ---
> > drivers/gpu/drm/i915/display/intel_dp_mst.c | 6 ++++++
> > 1 file changed, 6 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > index b8aee506d595..9cd59141953d 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > @@ -491,6 +491,12 @@ static void intel_mst_enable_dp(struct
> > intel_encoder *encoder,
> > struct intel_dp *intel_dp = &intel_dig_port->dp;
> > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> >
> > + drm_WARN_ON(&dev_priv->drm, pipe_config->has_pch_encoder);
> > +
> > + intel_enable_pipe(pipe_config);
> > +
> > + intel_crtc_vblank_on(pipe_config);
> > +
> > DRM_DEBUG_KMS("active links %d\n", intel_dp->active_mst_links);
> >
> > if (intel_de_wait_for_set(dev_priv, intel_dp-
> > >regs.dp_tp_status,
>
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
