Re: [PATCH 1/2] drm/i915: Disable tesselation clock gating on tgl A0

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Quoting Mika Kuoppala (2020-02-07 15:51:37)
> Disable TEDOP clock gating flow by programming 0x20A0[19] = 1
> 
> References: HSDES#1407928979
> Signed-off-by: Mika Kuoppala <mika.kuoppala@xxxxxxxxxxxxxxx>
Reviewed-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
-Chris
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