Reduce the amount of work we do to verify client blt correctness as currently our 0.5s subtests takes about 15s on slower devices! Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> --- .../i915/gem/selftests/i915_gem_object_blt.c | 24 ++++++++++++------- 1 file changed, 15 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_object_blt.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_object_blt.c index 62077fe46715..cebbe3c3ca86 100644 --- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_object_blt.c +++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_object_blt.c @@ -226,7 +226,7 @@ static int igt_fill_blt_thread(void *arg) GEM_BUG_ON(IS_ERR(ce)); do { - const u32 max_block_size = S16_MAX * PAGE_SIZE; + const u32 max_block_size = SZ_64M; /* max S16_MAX * PAGE_SIZE */ u32 val = prandom_u32_state(prng); u64 total = ce->vm->total; u32 phys_sz; @@ -276,13 +276,16 @@ static int igt_fill_blt_thread(void *arg) if (err) goto err_unpin; - i915_gem_object_lock(obj); - err = i915_gem_object_set_to_cpu_domain(obj, false); - i915_gem_object_unlock(obj); + err = i915_gem_object_wait(obj, I915_WAIT_ALL, HZ / 2); if (err) goto err_unpin; - for (i = 0; i < huge_gem_object_phys_size(obj) / sizeof(u32); ++i) { + for (i = 0; i < huge_gem_object_phys_size(obj) / sizeof(u32); i += 17) { + if (!(obj->cache_coherent & I915_BO_CACHE_COHERENT_FOR_READ)) { + clflush(&vaddr[i]); + mb(); + } + if (vaddr[i] != val) { pr_err("vaddr[%u]=%x, expected=%x\n", i, vaddr[i], val); @@ -335,7 +338,7 @@ static int igt_copy_blt_thread(void *arg) GEM_BUG_ON(IS_ERR(ce)); do { - const u32 max_block_size = S16_MAX * PAGE_SIZE; + const u32 max_block_size = SZ_64M; /* max S16_MAX * PAGE_SIZE */ u32 val = prandom_u32_state(prng); u64 total = ce->vm->total; u32 phys_sz; @@ -397,13 +400,16 @@ static int igt_copy_blt_thread(void *arg) if (err) goto err_unpin; - i915_gem_object_lock(dst); - err = i915_gem_object_set_to_cpu_domain(dst, false); - i915_gem_object_unlock(dst); + err = i915_gem_object_wait(dst, I915_WAIT_ALL, HZ / 2); if (err) goto err_unpin; for (i = 0; i < huge_gem_object_phys_size(dst) / sizeof(u32); ++i) { + if (!(dst->cache_coherent & I915_BO_CACHE_COHERENT_FOR_READ)) { + clflush(&vaddr[i]); + mb(); + } + if (vaddr[i] != val) { pr_err("vaddr[%u]=%x, expected=%x\n", i, vaddr[i], val); -- 2.25.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx