Quoting Chris Wilson (2020-01-27 16:03:11) > Quoting Tvrtko Ursulin (2020-01-27 15:52:51) > > > > On 26/01/2020 10:23, Chris Wilson wrote: > > > diff --git a/drivers/gpu/drm/i915/gt/intel_gt_irq.c b/drivers/gpu/drm/i915/gt/intel_gt_irq.c > > > index f796bdf1ed30..6ae64a224b02 100644 > > > --- a/drivers/gpu/drm/i915/gt/intel_gt_irq.c > > > +++ b/drivers/gpu/drm/i915/gt/intel_gt_irq.c > > > @@ -24,6 +24,13 @@ cs_irq_handler(struct intel_engine_cs *engine, u32 iir) > > > { > > > bool tasklet = false; > > > > > > + if (iir & GT_WAIT_SEMAPHORE_INTERRUPT) { > > > + WRITE_ONCE(engine->execlists.yield, > > > + ENGINE_READ_FW(engine, EXECLIST_CCID)); > > > + if (del_timer(&engine->execlists.timer)) > > > + tasklet = true; > > > > What if it fires before timeslice timer has been set up and when we miss > > to yield? > > We only set the timer after the HW ack, and we can legitimately hit a > semaphore in the user payload before we see the ack. That is > demonstrated aptly by live_timeslice_preempt. Hmm. I thought we would see the yield such that we would dequeue and process the new timelice regardless of the previous timer. -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx