The flush commands are independent from the submission method, so we can
re-use the same code.
RFC: I've kept the function in intel_lrc.c for now as my current plan is
to keep the common code there and split out execlists_submission out,
but maybe intel_gpu_commands.c would be a better location?
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@xxxxxxxxx>
Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
Cc: Michal Wajdeczko <michal.wajdeczko@xxxxxxxxx>
Cc: John Harrison <John.C.Harrison@xxxxxxxxx>
Cc: Matthew Brost <matthew.brost@xxxxxxxxx>
---
drivers/gpu/drm/i915/gt/intel_lrc.c | 8 +++-----
drivers/gpu/drm/i915/gt/intel_lrc.h | 4 ++++
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 3 +++
3 files changed, 10 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 7e912959fb3d..cd15ab7fb82f 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -3793,7 +3793,7 @@ static void gen8_logical_ring_disable_irq(struct intel_engine_cs *engine)
ENGINE_WRITE(engine, RING_IMR, ~engine->irq_keep_mask);
}
-static int gen8_emit_flush(struct i915_request *request, u32 mode)
+int gen8_emit_flush(struct i915_request *request, u32 mode)
{
u32 cmd, *cs;
@@ -3892,8 +3892,7 @@ static int gen8_emit_flush_render(struct i915_request *request,
return 0;
}
-static int gen11_emit_flush_render(struct i915_request *request,
- u32 mode)
+int gen11_emit_flush_render(struct i915_request *request, u32 mode)
{
if (mode & EMIT_FLUSH) {
u32 *cs;
@@ -3949,8 +3948,7 @@ static u32 preparser_disable(bool state)
return MI_ARB_CHECK | 1 << 8 | state;
}
-static int gen12_emit_flush_render(struct i915_request *request,
- u32 mode)
+int gen12_emit_flush_render(struct i915_request *request, u32 mode)
{
if (mode & EMIT_FLUSH) {
u32 flags = 0;
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.h b/drivers/gpu/drm/i915/gt/intel_lrc.h
index 07d1655ed8c0..c5afae6bc89b 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.h
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.h
@@ -87,6 +87,10 @@ void intel_logical_ring_cleanup(struct intel_engine_cs *engine);
int intel_execlists_submission_setup(struct intel_engine_cs *engine);
void intel_execlists_submission_vfuncs(struct intel_engine_cs *engine);
+int gen8_emit_flush(struct i915_request *request, u32 mode);
+int gen11_emit_flush_render(struct i915_request *request, u32 mode);
+int gen12_emit_flush_render(struct i915_request *request, u32 mode);
+
/* Logical Ring Contexts */
/* At the start of the context image is its per-process HWS page */
#define LRC_PPHWSP_PN (0)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index c688f21cc27e..edefb3cf135f 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -776,6 +776,7 @@ static void guc_submission_default_vfuncs(struct intel_engine_cs *engine)
engine->request_alloc = guc_submission_request_alloc;
+ engine->emit_flush = gen8_emit_flush;
engine->emit_init_breadcrumb = emit_init_breadcrumb;
engine->emit_fini_breadcrumb = emit_fini_breadcrumb_xcs;
@@ -796,9 +797,11 @@ static void rcs_submission_override(struct intel_engine_cs *engine)
switch (INTEL_GEN(engine->i915)) {
case 12:
+ engine->emit_flush = gen12_emit_flush_render;
engine->emit_fini_breadcrumb = gen12_emit_fini_breadcrumb_rcs;
break;
default:
+ engine->emit_flush = gen11_emit_flush_render;
engine->emit_fini_breadcrumb = gen11_emit_fini_breadcrumb_rcs;
break;
}
--
2.24.1
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