On 2020-01-13 at 23:11:28 -0500, Matt Atwood wrote:
> The bspec tells us we need to set this bit to avoid potential underruns.
>
> v2: use new register write convention (Anshuman) add bspec 7386 ref.
>
> Bspec: 7386
> Bspec: 33450
> Bspec: 33451
>
> Cc: Anshuman Gupta <anshuman.gupta@xxxxxxxxx>
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
Reviewed-by: Anshuman Gupta <anshuman.gupta@xxxxxxxxx>
> Signed-off-by: Matt Atwood <matthew.s.atwood@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> drivers/gpu/drm/i915/intel_pm.c | 4 ++++
> 2 files changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index cf770793be54..b9dc5e2ea606 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -7785,6 +7785,7 @@ enum {
>
> #define GEN8_CHICKEN_DCPR_1 _MMIO(0x46430)
> #define SKL_SELECT_ALTERNATE_DC_EXIT (1 << 30)
> +#define CNL_DELAY_PMRSP (1 << 22)
> #define MASK_WAKEMEM (1 << 13)
> #define CNL_DDI_CLOCK_REG_ACCESS_ON (1 << 7)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 148ac455dfa7..de585e670496 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -6610,6 +6610,10 @@ static void icl_init_clock_gating(struct drm_i915_private *dev_priv)
> /* Wa_1407352427:icl,ehl */
> intel_uncore_rmw(&dev_priv->uncore, UNSLICE_UNIT_LEVEL_CLKGATE2,
> 0, PSDUNIT_CLKGATE_DIS);
> +
> + /*Wa_14010594013:icl, ehl */
> + intel_uncore_rmw(&dev_priv->uncore, GEN8_CHICKEN_DCPR_1,
> + 0, CNL_DELAY_PMRSP);
> }
>
> static void tgl_init_clock_gating(struct drm_i915_private *dev_priv)
> --
> 2.21.1
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
