On Fri, 2020-01-10 at 17:45 -0800, Matt Roper wrote:
> I don't think we've ever hit these new error codes, but they're
> documented in the gen11 pcode document, so we might as well add them
> to
> the handler.
>
> Signed-off-by: Matt Roper <matthew.d.roper@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 2 ++
> drivers/gpu/drm/i915/intel_sideband.c | 4 ++++
> 2 files changed, 6 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h
> b/drivers/gpu/drm/i915/i915_reg.h
> index 6cc55c103f67..e5071af4a3b3 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -8987,6 +8987,8 @@ enum {
> #define GEN6_PCODE_UNIMPLEMENTED_CMD 0xFF
> #define GEN7_PCODE_TIMEOUT 0x2
> #define GEN7_PCODE_ILLEGAL_DATA 0x3
> +#define GEN11_PCODE_ILLEGAL_SUBCOMMAND 0x4
> +#define GEN11_PCODE_LOCKED 0x6
I can't find the error 0x6 in BSpec, what page are you looking at?
I'm checking 34151.
> #define GEN7_PCODE_MIN_FREQ_TABLE_GT_RATIO_OUT_OF_RANGE 0x10
> #define GEN6_PCODE_WRITE_RC6VIDS 0x4
> #define GEN6_PCODE_READ_RC6VIDS 0x5
> diff --git a/drivers/gpu/drm/i915/intel_sideband.c
> b/drivers/gpu/drm/i915/intel_sideband.c
> index cbfb7171d62d..3361fdc41ee1 100644
> --- a/drivers/gpu/drm/i915/intel_sideband.c
> +++ b/drivers/gpu/drm/i915/intel_sideband.c
> @@ -365,6 +365,10 @@ static inline int gen7_check_mailbox_status(u32
> mbox)
> return -ETIMEDOUT;
> case GEN7_PCODE_ILLEGAL_DATA:
> return -EINVAL;
> + case GEN11_PCODE_ILLEGAL_SUBCOMMAND:
> + return -ENXIO;
> + case GEN11_PCODE_LOCKED:
> + return -EBUSY;
> case GEN7_PCODE_MIN_FREQ_TABLE_GT_RATIO_OUT_OF_RANGE:
> return -EOVERFLOW;
> default:
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
