On Fri, 26 Oct 2012 10:33:00 +0300, Mika Kuoppala <mika.kuoppala at linux.intel.com> wrote: > On Thu, 25 Oct 2012 17:10:01 +0100, Damien Lespiau <damien.lespiau at gmail.com> wrote: > > @@ -127,13 +127,21 @@ ivb_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb, > > > > I915_WRITE(SPRSTRIDE(pipe), fb->pitches[0]); > > I915_WRITE(SPRPOS(pipe), (crtc_y << 16) | crtc_x); > > - if (obj->tiling_mode != I915_TILING_NONE) { > > - I915_WRITE(SPRTILEOFF(pipe), (y << 16) | x); > > + > > + if (IS_HASWELL(dev)) { > > + /* HSW consolidates SPRTILEOFF and SPRLINOFF into a single > > + * SPROFFSET register */ > > I don't know if upper layers sanitize already but > x should be < 8192 and y < 4096 in here, and both <4096 for ivb. > Emit warning and clamp if they are not in range? Should be -EINVAL on entry, and BUG_ON here if truly paranoid - knowledge of the hardware is already spread across the layers. -Chris -- Chris Wilson, Intel Open Source Technology Centre