On Thu, Jan 02, 2020 at 03:44:38PM -0800, Lucas De Marchi wrote:
> Today I saw this register and had a vague memory of having already
> removed it in the past.
> It seems this patch has never been reviewed/applied.
>
> Ping
Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
>
> Lucas De Marchi
>
> On Fri, Mar 8, 2019 at 3:23 PM Lucas De Marchi <lucas.demarchi@xxxxxxxxx> wrote:
> >
> > This register was placed in the middle of the PP_STATUS definition
> > instead of together with the PP_CONTROL where it should. Since it's not
> > used and there are no current plans to use it, just remove the
> > definition.
> >
> > v2: remove the define rather than moving it.
> >
> > Signed-off-by: Lucas De Marchi <lucas.demarchi@xxxxxxxxx>
> > ---
> > drivers/gpu/drm/i915/i915_reg.h | 11 -----------
> > 1 file changed, 11 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > index c0cd7a836799..4a855befa838 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -4692,17 +4692,6 @@ enum {
> > #define _PP_STATUS 0x61200
> > #define PP_STATUS(pps_idx) _MMIO_PPS(pps_idx, _PP_STATUS)
> > #define PP_ON (1 << 31)
> > -
> > -#define _PP_CONTROL_1 0xc7204
> > -#define _PP_CONTROL_2 0xc7304
> > -#define ICP_PP_CONTROL(x) _MMIO(((x) == 1) ? _PP_CONTROL_1 : \
> > - _PP_CONTROL_2)
> > -#define POWER_CYCLE_DELAY_MASK (0x1f << 4)
> > -#define POWER_CYCLE_DELAY_SHIFT 4
> > -#define VDD_OVERRIDE_FORCE (1 << 3)
> > -#define BACKLIGHT_ENABLE (1 << 2)
> > -#define PWR_DOWN_ON_RESET (1 << 1)
> > -#define PWR_STATE_TARGET (1 << 0)
> > /*
> > * Indicates that all dependencies of the panel are on:
> > *
> > --
> > 2.20.1
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
>
>
> --
> Lucas De Marchi
--
Ville Syrjälä
Intel
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