Quoting Matthew Auld (2019-12-30 16:06:47)
> On Sun, 29 Dec 2019 at 18:32, Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> wrote:
> > static const struct intel_context_ops execlists_context_ops = {
> > @@ -3968,7 +3982,6 @@ static void init_common_reg_state(u32 * const regs,
> > CTX_CTRL_RS_CTX_ENABLE);
> >
> > regs[CTX_RING_CTL] = RING_CTL_SIZE(ring->size) | RING_VALID;
> > - regs[CTX_BB_STATE] = RING_BB_PPGTT;
>
> Zero clue what that does...
It's supposed to be a readonly bit that shows the state of the current
batch buffer, and is supposed to be only set by MI_BB_START. Broadwell
and Braswell disagree with the bspec. C'est la vie.
I broke it out into a separate patch for clarity.
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
