Set up the RING_MI_NODE in new contexts to clear the STOP_RING bit, just in case they find it still set after a reset (as they are the first contexts to be run). Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> --- drivers/gpu/drm/i915/gt/intel_lrc.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c index 4fb70a7716e3..db6987fb8dd4 100644 --- a/drivers/gpu/drm/i915/gt/intel_lrc.c +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c @@ -4029,6 +4029,7 @@ static void execlists_init_reg_state(u32 *regs, * Must keep consistent with virtual_update_register_offsets(). */ u32 *bbe = set_offsets(regs, reg_offsets(engine), engine); + int x; if (close) { /* Close the batch; used mainly by live_lrc_layout() */ *bbe = MI_BATCH_BUFFER_END; @@ -4043,6 +4044,10 @@ static void execlists_init_reg_state(u32 *regs, INTEL_GEN(engine->i915) >= 12 ? GEN12_CTX_BB_PER_CTX_PTR : CTX_BB_PER_CTX_PTR); + + x = lrc_ring_mi_mode(engine); + if (x != -1) + regs[x + 1] = _MASKED_BIT_DISABLE(STOP_RING); } static int -- 2.25.0.rc0 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx