On Thu, Dec 19, 2019 at 01:10:52PM +0200, Kahola, Mika wrote:
> On Wed, 2019-12-18 at 18:10 +0200, Imre Deak wrote:
> > From: Dhinakaran Pandiyan <dhinakaran.pandiyan@xxxxxxxxx>
> >
> > intel_fill_fb_info() has grown quite large and wrapping the offset
> > checks
> > into a separate function makes the loop a bit easier to follow.
> >
> > Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> > Cc: Matt Roper <matthew.d.roper@xxxxxxxxx>
> > Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@xxxxxxxxx>
> > Signed-off-by: Imre Deak <imre.deak@xxxxxxxxx>
> > ---
> > drivers/gpu/drm/i915/display/intel_display.c | 70 +++++++++++-------
> > --
> > 1 file changed, 40 insertions(+), 30 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> > b/drivers/gpu/drm/i915/display/intel_display.c
> > index 9c27cf651e08..4b8b44c39724 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -2676,6 +2676,43 @@ static bool intel_plane_needs_remap(const
> > struct intel_plane_state *plane_state)
> > return stride > max_stride;
> > }
> >
> > +static int
> > +intel_fb_check_ccs_xy(struct drm_framebuffer *fb, int x, int y)
> > +{
> > + struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
> > + int hsub = fb->format->hsub;
> > + int vsub = fb->format->vsub;
> > + int tile_width, tile_height;
> > + int ccs_x, ccs_y;
> > + int main_x, main_y;
> > +
> > + intel_tile_dims(fb, 1, &tile_width, &tile_height);
> > +
> > + tile_width *= hsub;
> > + tile_height *= vsub;
> > +
> > + ccs_x = (x * hsub) % tile_width;
> > + ccs_y = (y * vsub) % tile_height;
> > + main_x = intel_fb->normal[0].x % tile_width;
> > + main_y = intel_fb->normal[0].y % tile_height;
> > +
> > + /*
> > + * CCS doesn't have its own x/y offset register, so the intra
> > CCS tile
> > + * x/y offsets must match between CCS and the main surface.
> > + */
> > + if (main_x != ccs_x || main_y != ccs_y) {
> > + DRM_DEBUG_KMS("Bad CCS x/y (main %d,%d ccs %d,%d) full
> > (main %d,%d ccs %d,%d)\n",
> > + main_x, main_y,
> > + ccs_x, ccs_y,
> > + intel_fb->normal[0].x,
> > + intel_fb->normal[0].y,
> > + x, y);
> > + return -EINVAL;
> > + }
> > +
> > + return 0;
> > +}
> > +
> > static int
> > intel_fill_fb_info(struct drm_i915_private *dev_priv,
> > struct drm_framebuffer *fb)
> > @@ -2706,36 +2743,9 @@ intel_fill_fb_info(struct drm_i915_private
> > *dev_priv,
> > return ret;
> > }
> >
> > - if (is_ccs_modifier(fb->modifier) && i == 1) {
> > - int hsub = fb->format->hsub;
> > - int vsub = fb->format->vsub;
> > - int tile_width, tile_height;
> > - int main_x, main_y;
> > - int ccs_x, ccs_y;
> > -
> > - intel_tile_dims(fb, i, &tile_width,
> > &tile_height);
> > - tile_width *= hsub;
> > - tile_height *= vsub;
> > -
> > - ccs_x = (x * hsub) % tile_width;
> > - ccs_y = (y * vsub) % tile_height;
> > - main_x = intel_fb->normal[0].x % tile_width;
> > - main_y = intel_fb->normal[0].y % tile_height;
> > -
> > - /*
> > - * CCS doesn't have its own x/y offset
> > register, so the intra CCS tile
> > - * x/y offsets must match between CCS and the
> > main surface.
> > - */
> > - if (main_x != ccs_x || main_y != ccs_y) {
> > - DRM_DEBUG_KMS("Bad CCS x/y (main %d,%d
> > ccs %d,%d) full (main %d,%d ccs %d,%d)\n",
> > - main_x, main_y,
> > - ccs_x, ccs_y,
> > - intel_fb->normal[0].x,
> > - intel_fb->normal[0].y,
> > - x, y);
> > - return -EINVAL;
> > - }
> > - }
> > + ret = intel_fb_check_ccs_xy(fb, x, y);
> We should check the ccs offsets only when we have ccs modifier in
> question.
Yes, thanks for spotting it. It gets fixed up in patch 6, but I'll
resend this fixing it here already.
>
> + if (ret)
> > + return ret;
> >
> > /*
> > * The fence (if used) is aligned to the start of the
> > object
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