On Mon, Dec 16, 2019 at 01:36:19PM +0530, Vandita Kulkarni wrote: > In some cases like latency[level]==0, wm[level].res_lines>31, > min_ddb_alloc can be U16_MAX, exclude it from the WARN_ON. > > v2: Specify the cases in which we hit U16_MAX, indentation (Ville) > > Fixes: 10a7e07b68b9 ("drm/i915: Make sure cursor has enough ddb for the selected wm level") > Suggested-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > Signed-off-by: Vandita Kulkarni <vandita.kulkarni@xxxxxxxxx> > Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_pm.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index ccbbdf4a6aab..7cdca06be3bd 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -4312,8 +4312,8 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *crtc_state, > &crtc_state->wm.skl.optimal.planes[plane_id]; > > if (plane_id == PLANE_CURSOR) { > - if (WARN_ON(wm->wm[level].min_ddb_alloc > > - total[PLANE_CURSOR])) { > + if (wm->wm[level].min_ddb_alloc > total[PLANE_CURSOR]) { > + WARN_ON(wm->wm[level].min_ddb_alloc != U16_MAX); Pushed to dinq. Thanks for the patch. > blocks = U32_MAX; > break; > } > -- > 2.21.0.5.gaeb582a -- Ville Syrjälä Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx