On Fri, 13 Dec 2019, Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> wrote: > On Thu, Dec 12, 2019 at 02:02:29PM -0500, Sean Paul wrote: >> From: Sean Paul <seanpaul@xxxxxxxxxxxx> >> >> These functions are all the same for dp and dp_mst, so expose them for >> use by the dp_mst hdcp implementation. >> >> Signed-off-by: Sean Paul <seanpaul@xxxxxxxxxxxx> >> Link: https://patchwork.freedesktop.org/patch/msgid/20191203173638.94919-11-sean@xxxxxxxxxx #v1 >> >> Changes in v2: >> -none >> --- >> .../drm/i915/display/intel_display_types.h | 22 +++++++++++++++++++ >> drivers/gpu/drm/i915/display/intel_dp.c | 14 ++---------- >> 2 files changed, 24 insertions(+), 12 deletions(-) >> >> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h >> index ac5af925e403..b9e1f4638ff2 100644 >> --- a/drivers/gpu/drm/i915/display/intel_display_types.h >> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h > > Don't we have have intel_dp.h these days? > > In fact might be nice to lift all the DP hdcp stuff into its own file. Agreed. > But not sure if that's doable or not. I think it's in fact patch 4 in this series that makes it doable. Maybe you could keep the functions static in the new file, and have the struct intel_hdcp_shim there too? BR, Jani. > >> @@ -1636,4 +1636,26 @@ static inline u32 intel_plane_ggtt_offset(const struct intel_plane_state *state) >> return i915_ggtt_offset(state->vma); >> } >> >> +int intel_dp_hdcp_write_an_aksv(struct intel_digital_port *intel_dig_port, >> + u8 *an); >> +int intel_dp_hdcp_read_bksv(struct intel_digital_port *intel_dig_port, >> + u8 *bksv); >> +int intel_dp_hdcp_read_bstatus(struct intel_digital_port *intel_dig_port, >> + u8 *bstatus); >> +int intel_dp_hdcp_read_bcaps(struct intel_digital_port *intel_dig_port, >> + u8 *bcaps); >> +int intel_dp_hdcp_repeater_present(struct intel_digital_port *intel_dig_port, >> + bool *repeater_present); >> +int intel_dp_hdcp_read_ri_prime(struct intel_digital_port *intel_dig_port, >> + u8 *ri_prime); >> +int intel_dp_hdcp_read_ksv_ready(struct intel_digital_port *intel_dig_port, >> + bool *ksv_ready); >> +int intel_dp_hdcp_read_ksv_fifo(struct intel_digital_port *intel_dig_port, >> + int num_downstream, u8 *ksv_fifo); >> +int intel_dp_hdcp_read_v_prime_part(struct intel_digital_port *intel_dig_port, >> + int i, u32 *part); >> +bool intel_dp_hdcp_check_link(struct intel_digital_port *intel_dig_port); >> +int intel_dp_hdcp_capable(struct intel_digital_port *intel_dig_port, >> + bool *hdcp_capable); >> + >> #endif /* __INTEL_DISPLAY_TYPES_H__ */ >> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c >> index 155067657e23..3d62b1b7224e 100644 >> --- a/drivers/gpu/drm/i915/display/intel_dp.c >> +++ b/drivers/gpu/drm/i915/display/intel_dp.c >> @@ -5915,7 +5915,6 @@ static void intel_dp_hdcp_wait_for_cp_irq(struct intel_hdcp *hdcp, int timeout) >> DRM_DEBUG_KMS("Timedout at waiting for CP_IRQ\n"); >> } >> >> -static >> int intel_dp_hdcp_write_an_aksv(struct intel_digital_port *intel_dig_port, >> u8 *an) >> { >> @@ -5947,8 +5946,7 @@ int intel_dp_hdcp_write_an_aksv(struct intel_digital_port *intel_dig_port, >> return 0; >> } >> >> -static int intel_dp_hdcp_read_bksv(struct intel_digital_port *intel_dig_port, >> - u8 *bksv) >> +int intel_dp_hdcp_read_bksv(struct intel_digital_port *intel_dig_port, u8 *bksv) >> { >> ssize_t ret; >> ret = drm_dp_dpcd_read(&intel_dig_port->dp.aux, DP_AUX_HDCP_BKSV, bksv, >> @@ -5960,7 +5958,7 @@ static int intel_dp_hdcp_read_bksv(struct intel_digital_port *intel_dig_port, >> return 0; >> } >> >> -static int intel_dp_hdcp_read_bstatus(struct intel_digital_port *intel_dig_port, >> +int intel_dp_hdcp_read_bstatus(struct intel_digital_port *intel_dig_port, >> u8 *bstatus) >> { >> ssize_t ret; >> @@ -5978,7 +5976,6 @@ static int intel_dp_hdcp_read_bstatus(struct intel_digital_port *intel_dig_port, >> return 0; >> } >> >> -static >> int intel_dp_hdcp_read_bcaps(struct intel_digital_port *intel_dig_port, >> u8 *bcaps) >> { >> @@ -5994,7 +5991,6 @@ int intel_dp_hdcp_read_bcaps(struct intel_digital_port *intel_dig_port, >> return 0; >> } >> >> -static >> int intel_dp_hdcp_repeater_present(struct intel_digital_port *intel_dig_port, >> bool *repeater_present) >> { >> @@ -6009,7 +6005,6 @@ int intel_dp_hdcp_repeater_present(struct intel_digital_port *intel_dig_port, >> return 0; >> } >> >> -static >> int intel_dp_hdcp_read_ri_prime(struct intel_digital_port *intel_dig_port, >> u8 *ri_prime) >> { >> @@ -6023,7 +6018,6 @@ int intel_dp_hdcp_read_ri_prime(struct intel_digital_port *intel_dig_port, >> return 0; >> } >> >> -static >> int intel_dp_hdcp_read_ksv_ready(struct intel_digital_port *intel_dig_port, >> bool *ksv_ready) >> { >> @@ -6039,7 +6033,6 @@ int intel_dp_hdcp_read_ksv_ready(struct intel_digital_port *intel_dig_port, >> return 0; >> } >> >> -static >> int intel_dp_hdcp_read_ksv_fifo(struct intel_digital_port *intel_dig_port, >> int num_downstream, u8 *ksv_fifo) >> { >> @@ -6062,7 +6055,6 @@ int intel_dp_hdcp_read_ksv_fifo(struct intel_digital_port *intel_dig_port, >> return 0; >> } >> >> -static >> int intel_dp_hdcp_read_v_prime_part(struct intel_digital_port *intel_dig_port, >> int i, u32 *part) >> { >> @@ -6090,7 +6082,6 @@ int intel_dp_hdcp_toggle_signalling(struct intel_digital_port *intel_dig_port, >> return 0; >> } >> >> -static >> bool intel_dp_hdcp_check_link(struct intel_digital_port *intel_dig_port) >> { >> ssize_t ret; >> @@ -6106,7 +6097,6 @@ bool intel_dp_hdcp_check_link(struct intel_digital_port *intel_dig_port) >> return !(bstatus & (DP_BSTATUS_LINK_FAILURE | DP_BSTATUS_REAUTH_REQ)); >> } >> >> -static >> int intel_dp_hdcp_capable(struct intel_digital_port *intel_dig_port, >> bool *hdcp_capable) >> { >> -- >> Sean Paul, Software Engineer, Google / Chromium OS -- Jani Nikula, Intel Open Source Graphics Center _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
