On Thu, Nov 14, 2019 at 05:05:12PM +0100, Maarten Lankhorst wrote: > DSC is available on the display emulator, but not set in DPCD. > Override the entries to allow bigjoiner testing. In general for these hacks for specific emulator, can we base it on certain i915 parameter like dsc_emaulator or something to override these values else we might actually affect DSC behaviour for the actual dsc panels. > > Signed-off-by: Maarten Lankhorst <maarten.lankhorst@xxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/drm_dp_helper.c | 4 ++-- > include/drm/drm_dp_helper.h | 1 + > 2 files changed, 3 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c > index 2c7870aef469..3d6038f35ea2 100644 > --- a/drivers/gpu/drm/drm_dp_helper.c > +++ b/drivers/gpu/drm/drm_dp_helper.c > @@ -1261,7 +1261,7 @@ u8 drm_dp_dsc_sink_max_slice_count(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], > if (slice_cap1 & DP_DSC_4_PER_DP_DSC_SINK) > return 4; > if (slice_cap1 & DP_DSC_2_PER_DP_DSC_SINK) > - return 2; > + return 4; Is this also needed for the big joiner since it doesnt return 4 slice count? Manasi > if (slice_cap1 & DP_DSC_1_PER_DP_DSC_SINK) > return 1; > } else { > @@ -1285,7 +1285,7 @@ u8 drm_dp_dsc_sink_max_slice_count(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], > if (slice_cap1 & DP_DSC_4_PER_DP_DSC_SINK) > return 4; > if (slice_cap1 & DP_DSC_2_PER_DP_DSC_SINK) > - return 2; > + return 4; > if (slice_cap1 & DP_DSC_1_PER_DP_DSC_SINK) > return 1; > } > diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h > index 51ecb5112ef8..2ebd7feffd90 100644 > --- a/include/drm/drm_dp_helper.h > +++ b/include/drm/drm_dp_helper.h > @@ -1270,6 +1270,7 @@ int drm_dp_dsc_sink_supported_input_bpcs(const u8 dsc_dpc[DP_DSC_RECEIVER_CAP_SI > static inline bool > drm_dp_sink_supports_dsc(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]) > { > + return dsc_dpcd[DP_DSC_REV - DP_DSC_SUPPORT]; > return dsc_dpcd[DP_DSC_SUPPORT - DP_DSC_SUPPORT] & > DP_DSC_DECOMPRESSION_IS_SUPPORTED; > } > -- > 2.24.0 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx