Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> writes: > The use GEM context itself was removed in commit cd30a5031704 > ("drm/i915/gem: Excise the per-batch whitelist from the context"), but > the locals were left in place as an oversight. Remove the parameters and > clean up. > > References: cd30a5031704 ("drm/i915/gem: Excise the per-batch whitelist from the context") > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > Cc: Mika Kuoppala <mika.kuoppala@xxxxxxxxxxxxxxx> Reviewed-by: Mika Kuoppala <mika.kuoppala@xxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 3 +-- > drivers/gpu/drm/i915/i915_cmd_parser.c | 11 ++++------- > drivers/gpu/drm/i915/i915_drv.h | 3 +-- > 3 files changed, 6 insertions(+), 11 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c > index 459f4d40b69b..34044c6203a5 100644 > --- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c > +++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c > @@ -2022,8 +2022,7 @@ static struct i915_vma *eb_parse(struct i915_execbuffer *eb) > > shadow_batch_start = gen8_canonical_addr(vma->node.start); > > - err = intel_engine_cmd_parser(eb->gem_context, > - eb->engine, > + err = intel_engine_cmd_parser(eb->engine, > eb->batch->obj, > batch_start, > eb->batch_start_offset, > diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c b/drivers/gpu/drm/i915/i915_cmd_parser.c > index 9125e89a9e7f..2ed497e7c9fd 100644 > --- a/drivers/gpu/drm/i915/i915_cmd_parser.c > +++ b/drivers/gpu/drm/i915/i915_cmd_parser.c > @@ -1306,8 +1306,7 @@ static bool check_cmd(const struct intel_engine_cs *engine, > return true; > } > > -static int check_bbstart(const struct i915_gem_context *ctx, > - u32 *cmd, u32 offset, u32 length, > +static int check_bbstart(u32 *cmd, u32 offset, u32 length, > u32 batch_len, > u64 batch_start, > u64 shadow_batch_start, > @@ -1392,7 +1391,6 @@ alloc_whitelist(struct drm_i915_private *i915, u32 batch_len) > > /** > * i915_parse_cmds() - parse a submitted batch buffer for privilege violations > - * @ctx: the context in which the batch is to execute > * @engine: the engine on which the batch is to execute > * @batch_obj: the batch buffer in question > * @batch_start: Canonical base address of batch > @@ -1408,8 +1406,7 @@ alloc_whitelist(struct drm_i915_private *i915, u32 batch_len) > * if the batch appears legal but should use hardware parsing > */ > > -int intel_engine_cmd_parser(struct i915_gem_context *ctx, > - struct intel_engine_cs *engine, > +int intel_engine_cmd_parser(struct intel_engine_cs *engine, > struct drm_i915_gem_object *batch_obj, > u64 batch_start, > u32 batch_start_offset, > @@ -1433,7 +1430,7 @@ int intel_engine_cmd_parser(struct i915_gem_context *ctx, > } > > /* Defer failure until attempted use */ > - jump_whitelist = alloc_whitelist(ctx->i915, batch_len); > + jump_whitelist = alloc_whitelist(engine->i915, batch_len); > > /* > * We use the batch length as size because the shadow object is as > @@ -1475,7 +1472,7 @@ int intel_engine_cmd_parser(struct i915_gem_context *ctx, > } > > if (desc->cmd.value == MI_BATCH_BUFFER_START) { > - ret = check_bbstart(ctx, cmd, offset, length, > + ret = check_bbstart(cmd, offset, length, > batch_len, batch_start, > shadow_batch_start, > jump_whitelist); > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index 0d4ad18e10dd..c3d8af28bfc1 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -1947,8 +1947,7 @@ const char *i915_cache_level_str(struct drm_i915_private *i915, int type); > int i915_cmd_parser_get_version(struct drm_i915_private *dev_priv); > void intel_engine_init_cmd_parser(struct intel_engine_cs *engine); > void intel_engine_cleanup_cmd_parser(struct intel_engine_cs *engine); > -int intel_engine_cmd_parser(struct i915_gem_context *cxt, > - struct intel_engine_cs *engine, > +int intel_engine_cmd_parser(struct intel_engine_cs *engine, > struct drm_i915_gem_object *batch_obj, > u64 user_batch_start, > u32 batch_start_offset, > -- > 2.24.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx