Re: [PATCH v3 08/13] drm/i915/dsi: abstract afe_clk calculation

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> -----Original Message-----
> From: Jani Nikula <jani.nikula@xxxxxxxxx>
> Sent: Tuesday, November 26, 2019 7:13 PM
> To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> Cc: Nikula, Jani <jani.nikula@xxxxxxxxx>; Kulkarni, Vandita
> <vandita.kulkarni@xxxxxxxxx>; Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> Subject: [PATCH v3 08/13] drm/i915/dsi: abstract afe_clk calculation
> 
> We'll make more use of it in the future.
> 
> Cc: Vandita Kulkarni <vandita.kulkarni@xxxxxxxxx>
> Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx>

Looks good to me.
Reviewed-by: Vandita Kulkarni <vandita.kulkarni@xxxxxxxxx>

Thanks,
Vandita
> ---
>  drivers/gpu/drm/i915/display/icl_dsi.c | 18 +++++++++++++-----
>  1 file changed, 13 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c
> b/drivers/gpu/drm/i915/display/icl_dsi.c
> index ef53ed6d3ecf..de3743233dcb 100644
> --- a/drivers/gpu/drm/i915/display/icl_dsi.c
> +++ b/drivers/gpu/drm/i915/display/icl_dsi.c
> @@ -301,18 +301,26 @@ static void configure_dual_link_mode(struct
> intel_encoder *encoder,
>  	I915_WRITE(DSS_CTL1, dss_ctl1);
>  }
> 
> +/* aka DSI 8X clock */
> +static int afe_clk(struct intel_encoder *encoder) {
> +	struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
> +	int bpp;
> +
> +	bpp = mipi_dsi_pixel_format_to_bpp(intel_dsi->pixel_format);
> +
> +	return DIV_ROUND_CLOSEST(intel_dsi->pclk * bpp,
> +intel_dsi->lane_count); }
> +
>  static void gen11_dsi_program_esc_clk_div(struct intel_encoder *encoder)  {
>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
>  	struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
>  	enum port port;
> -	u32 bpp = mipi_dsi_pixel_format_to_bpp(intel_dsi->pixel_format);
> -	u32 afe_clk_khz; /* 8X Clock */
> +	int afe_clk_khz;
>  	u32 esc_clk_div_m;
> 
> -	afe_clk_khz = DIV_ROUND_CLOSEST(intel_dsi->pclk * bpp,
> -					intel_dsi->lane_count);
> -
> +	afe_clk_khz = afe_clk(encoder);
>  	esc_clk_div_m = DIV_ROUND_UP(afe_clk_khz, DSI_MAX_ESC_CLK);
> 
>  	for_each_dsi_port(port, intel_dsi->ports) {
> --
> 2.20.1

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