Add two helpers that for reading the actual GT's frequency. The two helpers are: - intel_cagf_read: reads the frequency and returns it not normalized - intel_cagf_freq_read: provides the frequency in Hz. Use the above helpers in sysfs and debugfs. Signed-off-by: Andi Shyti <andi.shyti@xxxxxxxxx> --- drivers/gpu/drm/i915/gt/intel_rps.c | 22 ++++++++++++++++++++++ drivers/gpu/drm/i915/gt/intel_rps.h | 2 ++ drivers/gpu/drm/i915/i915_debugfs.c | 21 +++++---------------- drivers/gpu/drm/i915/i915_sysfs.c | 14 ++------------ 4 files changed, 31 insertions(+), 28 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c index 08a38a3b90b0..72c3dd976e32 100644 --- a/drivers/gpu/drm/i915/gt/intel_rps.c +++ b/drivers/gpu/drm/i915/gt/intel_rps.c @@ -1682,6 +1682,28 @@ u32 intel_get_cagf(struct intel_rps *rps, u32 rpstat) return cagf; } +u32 intel_cagf_read(struct intel_rps *rps) +{ + struct drm_i915_private *i915 = rps_to_i915(rps); + u32 freq; + + if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) { + vlv_punit_get(i915); + freq = vlv_punit_read(i915, PUNIT_REG_GPU_FREQ_STS); + vlv_punit_put(i915); + + return (freq >> 8) & 0xff; + } + + return intel_get_cagf(rps, intel_uncore_read(rps_to_gt(rps)->uncore, + GEN6_RPSTAT1)); +} + +u32 intel_cagf_freq_read(struct intel_rps *rps) +{ + return intel_gpu_freq(rps, intel_cagf_read(rps)); +} + /* External interface for intel_ips.ko */ static struct drm_i915_private __rcu *ips_mchdev; diff --git a/drivers/gpu/drm/i915/gt/intel_rps.h b/drivers/gpu/drm/i915/gt/intel_rps.h index 9518c66c9792..338f8924cd0f 100644 --- a/drivers/gpu/drm/i915/gt/intel_rps.h +++ b/drivers/gpu/drm/i915/gt/intel_rps.h @@ -30,6 +30,8 @@ void intel_rps_mark_interactive(struct intel_rps *rps, bool interactive); int intel_gpu_freq(struct intel_rps *rps, int val); int intel_freq_opcode(struct intel_rps *rps, int val); u32 intel_get_cagf(struct intel_rps *rps, u32 rpstat1); +u32 intel_cagf_read(struct intel_rps *rps); +u32 intel_cagf_freq_read(struct intel_rps *rps); void gen5_rps_irq_handler(struct intel_rps *rps); void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir); diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index eb80a2c4b55b..3f1d0e2e7576 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -891,7 +891,7 @@ static int i915_frequency_info(struct seq_file *m, void *unused) rpdownei = I915_READ(GEN6_RP_CUR_DOWN_EI) & GEN6_CURIAVG_MASK; rpcurdown = I915_READ(GEN6_RP_CUR_DOWN) & GEN6_CURBSYTAVG_MASK; rpprevdown = I915_READ(GEN6_RP_PREV_DOWN) & GEN6_CURBSYTAVG_MASK; - cagf = intel_gpu_freq(rps, intel_get_cagf(rps, rpstat)); + cagf = intel_cagf_freq_read(rps); intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL); @@ -1633,21 +1633,11 @@ static int i915_rps_boost_info(struct seq_file *m, void *data) { struct drm_i915_private *dev_priv = node_to_i915(m->private); struct intel_rps *rps = &dev_priv->gt.rps; - u32 act_freq = rps->cur_freq; + u32 act_freq; intel_wakeref_t wakeref; - with_intel_runtime_pm_if_in_use(&dev_priv->runtime_pm, wakeref) { - if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { - vlv_punit_get(dev_priv); - act_freq = vlv_punit_read(dev_priv, - PUNIT_REG_GPU_FREQ_STS); - vlv_punit_put(dev_priv); - act_freq = (act_freq >> 8) & 0xff; - } else { - act_freq = intel_get_cagf(rps, - I915_READ(GEN6_RPSTAT1)); - } - } + with_intel_runtime_pm_if_in_use(&dev_priv->runtime_pm, wakeref) + act_freq = intel_cagf_freq_read(rps); seq_printf(m, "RPS enabled? %d\n", rps->enabled); seq_printf(m, "GPU busy? %s\n", yesno(dev_priv->gt.awake)); @@ -1655,8 +1645,7 @@ static int i915_rps_boost_info(struct seq_file *m, void *data) atomic_read(&rps->num_waiters)); seq_printf(m, "Interactive? %d\n", READ_ONCE(rps->power.interactive)); seq_printf(m, "Frequency requested %d, actual %d\n", - intel_gpu_freq(rps, rps->cur_freq), - intel_gpu_freq(rps, act_freq)); + intel_gpu_freq(rps, rps->cur_freq), act_freq); seq_printf(m, " min hard:%d, soft:%d; max soft:%d, hard:%d\n", intel_gpu_freq(rps, rps->min_freq), intel_gpu_freq(rps, rps->min_freq_softlimit), diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c index 65476909d1bf..176cdb139f0b 100644 --- a/drivers/gpu/drm/i915/i915_sysfs.c +++ b/drivers/gpu/drm/i915/i915_sysfs.c @@ -265,20 +265,10 @@ static ssize_t gt_act_freq_mhz_show(struct device *kdev, u32 freq; wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm); - - if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { - vlv_punit_get(dev_priv); - freq = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS); - vlv_punit_put(dev_priv); - - freq = (freq >> 8) & 0xff; - } else { - freq = intel_get_cagf(rps, I915_READ(GEN6_RPSTAT1)); - } - + freq = intel_cagf_freq_read(rps); intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref); - return snprintf(buf, PAGE_SIZE, "%d\n", intel_gpu_freq(rps, freq)); + return snprintf(buf, PAGE_SIZE, "%d\n", freq); } static ssize_t gt_cur_freq_mhz_show(struct device *kdev, -- 2.24.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx