On Tue, Dec 03, 2019 at 10:18:51AM +0100, Maarten Lankhorst wrote:
> Op 28-11-2019 om 20:04 schreef Ville Syrjälä:
> > On Thu, Nov 14, 2019 at 05:05:15PM +0100, Maarten Lankhorst wrote:
> >> Small changes to intel_dp_mode_valid(), allow listing modes that
> >> can only be supported in the bigjoiner configuration, which is
> >> not supported yet.
> >>
> >> eDP does not support bigjoiner, so do not expose bigjoiner only
> >> modes on the eDP port.
> >>
> >> Changes since v1:
> >> - Disallow bigjoiner on eDP.
> >> Changes since v2:
> >> - Rename intel_dp_downstream_max_dotclock to intel_dp_max_dotclock,
> >> and split off the downstream and source checking to its own function.
> >> (Ville)
> >>
> >> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@xxxxxxxxxxxxxxx>
> >> ---
> >> drivers/gpu/drm/i915/display/intel_dp.c | 117 ++++++++++++++++++------
> >> 1 file changed, 89 insertions(+), 28 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> >> index 3123958e2081..9b7df8e85ea2 100644
> >> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> >> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> >> @@ -243,25 +243,37 @@ intel_dp_max_data_rate(int max_link_clock, int max_lanes)
> >> return max_link_clock * max_lanes;
> >> }
> >>
> >> -static int
> >> -intel_dp_downstream_max_dotclock(struct intel_dp *intel_dp)
> >> +static int source_max_dotclock(struct intel_dp *intel_dp, bool allow_bigjoiner)
> >> {
> >> struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
> >> struct intel_encoder *encoder = &intel_dig_port->base;
> >> - struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> >> - int max_dotclk = dev_priv->max_dotclk_freq;
> >> - int ds_max_dotclk;
> >> + struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> >> +
> >> + if (allow_bigjoiner && INTEL_GEN(i915) >= 11 && !intel_dp_is_edp(intel_dp))
> > Should the edp check actually be check for the edp transcoder
> > (ie. port A) on icl?
> Isn't that equivalent to this check?
You can have eDP on other ports (at least in theory).
Also on tgl+ there is no eDP transcoder anymore.
--
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
