On Wed, 2019-11-27 at 21:05 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
>
> Assuming intel_crtc_arm_fifo_underrun() only gets called when
> there's no pending plane updates we can utilize it on gen2 by
> checking the active_planes bitmask so that we only re-enable
> underrun reporting if some planes are active.
> i915_fifo_underrun_reset_write() seems to have the necessary
> hw_done/flip_done waits in place.
Reviewed-by: José Roberto de Souza <jose.souza@xxxxxxxxx>
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 4377ee2eee56..ec363972e0ac 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -14221,7 +14221,7 @@ void intel_crtc_arm_fifo_underrun(struct
> intel_crtc *crtc,
> {
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>
> - if (!IS_GEN(dev_priv, 2))
> + if (!IS_GEN(dev_priv, 2) || crtc_state->active_planes)
> intel_set_cpu_fifo_underrun_reporting(dev_priv, crtc-
> >pipe, true);
>
> if (crtc_state->has_pch_encoder) {
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