On Thu, Nov 21, 2019 at 04:42:31PM +0530, Ramalingam C wrote:
+ /* Wa_1604555607:tgl */ + val = intel_uncore_read(engine->uncore, FF_MODE2); + val &= ~FF_MODE2_TDS_TIMER_MASK; + val |= FF_MODE2_TDS_TIMER_128; + __wa_write_masked_or(wal, FF_MODE2, FF_MODE2_TDS_TIMER_MASK, val, + IS_TGL_REVID(engine->i915, 0, TGL_REVID_A0) ? 0:
isn't it broken until B0 rather than only on A0? I think we could just disable the read back for all revs and then selectively enable it for later. Lucas De Marchi _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
