On Mon, 2019-11-18 at 08:50 -0800, Matt Roper wrote: > On Mon, Nov 18, 2019 at 08:44:12AM -0800, Matt Roper wrote: > > The bspec was recently updated with new cdclk -> voltage level > > tables to > > accomodate the new 324/326.4 cdclk values. > > > > Bspec: 21809 > > Cc: José Roberto de Souza <jose.souza@xxxxxxxxx> > > Cc: Vivek Kasireddy <vivek.kasireddy@xxxxxxxxx> > > Cc: Bob Paauwe <bob.j.paauwe@xxxxxxxxx> > > Signed-off-by: Matt Roper <matthew.d.roper@xxxxxxxxx> > > And > > Fixes: 63c9dae71dc5 ("drm/i915/ehl: Add voltage level requirement > table") > > since using the old table could result in us requesting too low a > voltage level for the highest cdclk values. Reviewed-by: José Roberto de Souza <jose.souza@xxxxxxxxx> > > > Matt > > > --- > > There are some platform tagging issues on this bspec page and > > multiple > > tables are actually tagged with the EHL label, but the bspec > > changelog > > makes it pretty clear which table we're supposed to be using (plus > > the > > other tables don't match the set of cdclks supported by the > > platform). > > > > drivers/gpu/drm/i915/display/intel_cdclk.c | 4 +++- > > 1 file changed, 3 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c > > b/drivers/gpu/drm/i915/display/intel_cdclk.c > > index 8b702317557e..7d1ab1e5b7c3 100644 > > --- a/drivers/gpu/drm/i915/display/intel_cdclk.c > > +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c > > @@ -1273,7 +1273,9 @@ static u8 icl_calc_voltage_level(int cdclk) > > > > static u8 ehl_calc_voltage_level(int cdclk) > > { > > - if (cdclk > 312000) > > + if (cdclk > 326400) > > + return 3; > > + else if (cdclk > 312000) > > return 2; > > else if (cdclk > 180000) > > return 1; > > -- > > 2.21.0 > > _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx