On Thu, Nov 14, 2019 at 01:50:46PM -0800, Radhakrishna Sripada wrote:
> Disable VS Unit Clockgating.
>
> v2: Fix VSUNIT instead of VFUNIT(Ville)
The VSUNIT bit (bit 3) isn't supposed to exist on gen12 according to the
bspec. However there's a separate programming note indicating that the
(supposedly non-existent) bit should be set as a workaround on TGL.
I previously raised this in HSD but never got a response. I'll file a
bspec ticket.
Matt
>
> BSpec: 52857
> Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> Cc: Mika Kuoppala <mika.kuoppala@xxxxxxxxxxxxxxx>
> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> drivers/gpu/drm/i915/intel_pm.c | 4 ++++
> 2 files changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 478f5ff6c554..8fb3d2082806 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -4178,6 +4178,7 @@ enum {
>
> #define UNSLICE_UNIT_LEVEL_CLKGATE _MMIO(0x9434)
> #define VFUNIT_CLKGATE_DIS (1 << 20)
> +#define VSUNIT_CLKGATE_DIS (1 << 3)
>
> #define INF_UNIT_LEVEL_CLKGATE _MMIO(0x9560)
> #define CGPSF_CLKGATE_DIS (1 << 3)
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 05ba9e1bd247..3aaad4957675 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -6580,6 +6580,10 @@ static void tgl_init_clock_gating(struct drm_i915_private *dev_priv)
>
> I915_WRITE(POWERGATE_ENABLE,
> I915_READ(POWERGATE_ENABLE) | vd_pg_enable);
> +
> + /* Wa_1408615072:tgl */
> + I915_WRITE(UNSLICE_UNIT_LEVEL_CLKGATE,
> + I915_READ(UNSLICE_UNIT_LEVEL_CLKGATE) | VSUNIT_CLKGATE_DIS);
> }
>
> static void cnp_init_clock_gating(struct drm_i915_private *dev_priv)
> --
> 2.20.1
>
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--
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795
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